PDF MT1020A Data sheet ( Hoja de datos )

Número de pieza	MT1020A
Descripción	Bluetooth Baseband Controller
Fabricantes	Zarlink Semiconductor
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No Preview Available ! MT1020A Bluetooth™ Baseband Controller Product Brief Features PB5630 ISSUE 2.0 September 2001 • Bluetooth v1.1 compliant Link Controller • Programmable Radio Interface including BlueRF • Full Bluetooth Protocol Stack up to HCI Ordering Information MT1020A/IG/BP1N 121-pin SSBGA • Full Duplex Audio CODEC including filtering based microcontroller with on-chip memory, a full • Linear PCM to log PCM and CVSD conversion duplex voice CODEC and a dedicated Bluetooth • Advanced Block Power Management • Embedded ARM7TDMI™ Microcontroller Core m• Configurable l/O supply 1.8 to 3.6V • 1.8V internal supply option for Low Power o• IP Hardware and Software available for .cembedded applications • Single CPU Bluetooth system capability UApplications t4• Wireless Headsets • Wireless Accessories e• Cellular Phones • Automotive e• PDA, Laptop Computers h• Digital Cameras SDescription taThe MT1020A is a complete Bluetooth baseband processor It combines an advanced ARM7TDMI Baseband Peripheral (BBP) block. The BBP implements all the time-critical elements of Bluetooth communication in hardware, with minimal involvement by the microcontroller. Relieving the on-chip processor of these repetitive tasks makes it possible for the MT1020A to run entire applications without an external host processor. A UART Interface is provided for use when operation with an an external host processor is required. Comprehensive power management maximises battery life for portable applications making the MT1020A particularly suitable for low power applications, especially those involving voice traffic. Absolute Maximum Ratings Supply voltage (VDD ) -0.5V to +5V Input voltage Output voltage Static discharge (HBM)* -0.5V to OpVDD +0.5V -0.5V to OpVDD +0.5V 2kV Storage temperature, TSTG -55°C to +150°C * Human Body Model .DaMic Earphone Linear PCM wwHost wUART AUDIO CODEC HOST UART QUEUE MANAGEMENT BLOCK HOST INTERFACE BUFFER RAM BLUETOOTH LINK CONTROLLER VOICE ENCODING TRANSLATOR SYSTEM BUS INTERFACE Radio Interface Bluetooth Baseband Peripheral (BBP) Block System RAM External Memory Bus GPIO Embedded Microcontroller GPIO Ext'l Interrupt Ints Controller Watchdog Memory/Peripheral Controller UART1 UART1 BSIO BSIO DMA Timer/ counter ARM7TDMI Figure 1 - MT1020A Block Diagram SSM Test & Debug 1 1 page Preliminary Information MT1020A Signal Name SUBGND Pin (see notes) I/O Type Qty Description A4: A10: J8: L1: L10 5 Analog Ground OPVDD A7: C1: F11: H1 4 System I/O VDD RIVDD LAVDD K5 A5: E1: E11: G1: K7 1 Radio Interface VDD 5 Core VDD PLL_VDD B4 1 Phase Lock Loop VDD Note: Table 1 - Pin Descriptions (continued) The UART CTS and RTS signals(U1RTS, U1CTS, HST_UART_RTS & HST_UART_CTS) are all active low at the chip, but become active high after passing through a RS232 line driver IC. Key to Signal Types: I input O Output I/O Bidirectional pu Internal Pull-up pd Internal Pull-down hd Internal Peripheral HOLD cell: holds the previous voltage level of an input, until the weak drive of the hold cell is overdriven by normal drive output. This can be either as part of a MT1020A bi-directional peripheral cell or an external device. 5 5 Page

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