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HI-8683 の電気的特性と機能

HI-8683のメーカーはHolt Integrated Circuitsです、この部品の機能は「(HI-8683 / HI-8684) ARINC INTERFACE DEVICE ARINC 429 & 561 SERIAL DATA TO 8-BIT PARALLEL DATA」です。


製品の詳細 ( Datasheet PDF )

部品番号 HI-8683
部品説明 (HI-8683 / HI-8684) ARINC INTERFACE DEVICE ARINC 429 & 561 SERIAL DATA TO 8-BIT PARALLEL DATA
メーカ Holt Integrated Circuits
ロゴ Holt Integrated Circuits ロゴ 




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HI-8683 Datasheet, HI-8683 PDF,ピン配置, 機能
January 2001
HI-8683, HI-8684
ARINC INTERFACE DEVICE
ARINC 429 & 561 Serial Data to 8-Bit Parallel Data
DESCRIPTION
The HI-8683 and HI-8684 are system components for
interfacing incoming ARINC 429 signals to 8-bit parallel
data using proven +5V analog/digital CMOS technology.
The HI-8683 is a digital device that requires an external
analog line receiver such as the HI-8482 or HI-8588
between the ARINC bus and the device inputs. The HI-8684
incorporates the digital logic and analog line receiver
circuitry in a single device.
The HI-8683 is also available as a second source to the
DLS-112 with the original 18 pin DIP and 28 pin PLCC
package pinouts.
The receivers on the HI-8684 connect directly to the ARINC
429 Bus and translate the incoming signals to normal CMOS
levels. Internal comparator levels are set just below the
standard 6.5 volt minimum data threshold and just above the
standard 2.5 volt maximum null threshold. The -10 version
of the HI-8684 allows the incorporation of an external 10K
resistance in series with each ARINC input for lightning
protection without affecting ARINC level detection.
Both products offer high speed 8-bit parallel bus interface, a
32-bit buffer, and error detection for word length and parity.
A reset pin is also provided for power-on initialization.
FEATURES
! Automatic conversion of serial ARINC 429, 575 &
561 data to 8-bit parallel data
! High speed parallel 8-bit data bus
! Error detection - word length and parity
! Reset input for power-on initialization
! On-chip line receiver option (HI-8684)
! Input hysteresis of at least 2 volts (HI-8684)
! Test inputs bypass analog inputs (HI-8684)
! Simplified lightning protection with the ability to add
10 Kohm external series resistors (HI-8684-10)
! Plastic package options - surface mount (SOIC),
PLCC and DIP
! Military processing available
PIN CONFIGURATIONS (Top View)
DATARDY 1
D7 2
D6 3
D5 4
D4 5
D3 6
D2 7
D1 8
D0 9
HI-8683PSI
HI-8683PST
18 Vcc
17 GAPCLK
16 RESET
15 INB
14 INA
13 ERROR
12 PARITY ENB
11 READ
10 GND
HI-8683
18-Pin Plastic SOIC - WB Package
Vcc 1
20 GAPCLK
DATARDY 2
19 TESTA
D7 3
18 TESTB
D6 4 HI-8684PSI 17 RESET
D5 5
D4 6
HI-8684PST
&
HI-8684PSI-10
16 RINB (-10)
15 RINA (-10)
D3 7 HI-8684PST-10 14 ERROR
D2 8
13 PARITY ENB
D1 9
12 READ
D0 10
11 GND
HI-8684
20-Pin Plastic SOIC - WB Package
(See page 8 for additional pin configurations)
(DS8683 Rev. D)
HOLT INTEGRATED CIRCUITS
1
01/01

1 Page





HI-8683 pdf, ピン配列
HI-8683, HI-8684
PARITY
ENB
INA
ESD
PROTECTION
INB
HI-8683 ONLY
RINA-10
10K
RINA
RINB
10K
RINB-10
25K
25K
ESD
PROTECTION
&
LINE
RECEIVER
TESTA
TESTB
HI-8684 ONLY
GAPCLK
RESET
READ
RXA
RXB
CLOCK
&
DATA
DETECT
CLK
PARITY
DETECT
DATA
BIT
COUNT
ERROR
DETECT
ERROR
BIT 32
BIT 32
32-BIT
SHIFT
REG.
32
32-BIT
RECEIVE 32
BUFFER
32-BIT
TO
8-BIT
MUX
8
D0 - D7
GAP
DETECT
BYTE
COUNT
DATA RDY
Figure 1. Block Diagram
FUNCTIONAL DESCRIPTION (cont.)
PROTOCOL DETECTION
GAP DETECTION
ARINC clock and data in the HI-8683 are derived from the
two streams of digital data at the INA and INB inputs and the
resulting One/Zero data is shifted into a 32-bit input register
as illustrated in Figure 3.
In the HI-8684, the One/Zero data shifted into the input reg-
ister is created from either the two digital outputs of the built-
in line receiver (Figure 3) or the TESTA and TESTB inputs
(Figure 4).
For ARINC 561 operation, the INA and INB data streams in-
puts must be derived from the ARINC 561 data, clock and
sync with external logic.
The end of a data word is detected by an internal counter
that times out when a data One or Zero is not received for a
period equal to 16 cycles of the GAPCLK signal. The gap
detection time may vary between 16 and 17 cycles of the
GAPCLK signal since the incoming data and GAPCLK are
not usually synchronous inputs. The required frequency of
GAPCLK is a function of the mininum gap time specified for
the type of ARINC data being received. Table 1 indicates
typical frequencies that may be used for the various data
rates normally encountered.
DATABUS
TYPE
429
BIT PERIOD
(µs)
10
429 69 - 133
575 69 - 133
561 69 - 133
MINIMUM GAP
(µs)
45
310 - 599
310 - 599
103 - 200
GAP CLOCK
MHz
0.75
1.0
1.5
0.1
0.1
0.2
GAP DETECTION
TIME (µs)
21.3 - 22.7
16 - 17
10.7 - 11.3
160 - 170
160 - 170
80 - 85
Table 1 - Typical Gap Detection Times
HOLT INTEGRATED CIRCUITS
3


3Pages


HI-8683 電子部品, 半導体
HI-8683, HI-8684
ABSOLUTE MAXIMUM RATINGS
All voltages referenced to GND
Supply voltages
VCC ....................................................... +7.0V
Voltage on inputs
RINA (-10) to RINB (-10) ......... +29V to - 29V
All other input pins..................-0.3 to Vcc +0.3
DC current per input pin ....................... +10mA
Power dissipation at 25°C
plastic 18-pin SO..... 1.9W, derate 15.4mW/°C
plastic 18-pin DIP .....1.6W, derate 13.3mW/°C
plastic 20-pin SO......1.4W, derate 11.5mW/°C
plastic 20-pin PLCC .2.0W, derate 17.2mW/°C
Solder Temperature
Leads ................................ +280°C for 10 sec
Package body .....................................+220°C
Storage Temperature ............. -65°C to +150°C
RECOMMENDED OPERATING CONDITIONS
Supply Voltages
VCC.................................................+5V ± 10%
Temperature Range
Industrial Screening .............. -40°C to +85°C
Hi-Temp Screening .............. -55°C to +125°C
Military Screening..................-55°C to +125°C
Junction Temperature, Tj .................... ≤+175°C
NOTE: Stresses above absolute maximum
ratings or outside recommended operating
conditions may cause permanent damage to
the device. These are stress ratings only.
Operation at the limits is not recommended.
DC ELECTRICAL CHARACTERISTICS
Vcc = 5V, GND = 0V, TA = Operating Temperature Range (unless otherwise specified).
PARAMETERS
SYMBOL TEST CONDITIONS
ARINC Bus Inputs (RINA & RINB, HI-8684 only)
Differential input voltage
one or zero
null
common mode
VDIN
VNIN
VCOM
differential voltage
" " ""
with respect to GND
Input resistance
RINA (-10) to RINB (-10)
RINA (-10) or RINB (-10) to GND or VCC
RDIFF
RSUP
supplies floating
"" "'
Input capacitance (Guaranteed but not tested)
differential
to GND
to VCC
CDIFF
CG
CH
RINA to RINB
MIN TYP MAX UNITS
6.5 10.0 13.0 volts
- - 2.75 volts
- - 5.0 volts
30 75
19 40
- Kohm
- Kohm
- - 20 pF
- - 20 pF
- - 20 pF
HOLT INTEGRATED CIRCUITS
6

6 Page



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共有リンク

Link :


部品番号部品説明メーカ
HI-8683

(HI-8683 / HI-8684) ARINC INTERFACE DEVICE ARINC 429 & 561 SERIAL DATA TO 8-BIT PARALLEL DATA

Holt Integrated Circuits
Holt Integrated Circuits
HI-8684

(HI-8683 / HI-8684) ARINC INTERFACE DEVICE ARINC 429 & 561 SERIAL DATA TO 8-BIT PARALLEL DATA

Holt Integrated Circuits
Holt Integrated Circuits
HI-8685

(HI-8685 / HI-8686) ARINC INTERFACE DEVICE ARINC 429 & 561 SERIAL DATA TO 16-BIT PARALLEL DATA

Holt Integrated Circuits
Holt Integrated Circuits
HI-8686

(HI-8685 / HI-8686) ARINC INTERFACE DEVICE ARINC 429 & 561 SERIAL DATA TO 16-BIT PARALLEL DATA

Holt Integrated Circuits
Holt Integrated Circuits


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