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LM555 の電気的特性と機能

LM555のメーカーはHarris Corporationです、この部品の機能は「Timers for Timing Delays and Oscillator Application in Commercial」です。


製品の詳細 ( Datasheet PDF )

部品番号 LM555
部品説明 Timers for Timing Delays and Oscillator Application in Commercial
メーカ Harris Corporation
ロゴ Harris Corporation ロゴ 




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LM555 Datasheet, LM555 PDF,ピン配置, 機能
www.DataSheet4U.com
SEMICONDUCTOR
May 1997
CA555, CA555C,
LM555, LM555C, NE555
Timers for Timing Delays and Oscillator Application
in Commercial, Industrial and Military Equipment
Features
Description
• Accurate Timing From Microseconds Through Hours
• Astable and Monostable Operation
• Adjustable Duty Cycle
• Output Capable of Sourcing or Sinking up to 200mA
• Output Capable of Driving TTL Devices
• Normally ON and OFF Outputs
• High Temperature Stability . . . . . . . . . . . . . . 0.005%/oC
• Directly Interchangeable with SE555, NE555, MC1555,
and MC1455
The CA555 and CA555C are highly stable timers for use in
precision timing and oscillator applications. As timers, these
monolithic integrated circuits are capable of producing accu-
rate time delays for periods ranging from microseconds
through hours. These devices are also useful for astable
oscillator operation and can maintain an accurately con-
trolled free running frequency and duty cycle with only two
external resistors and one capacitor.
Applications
• Precision Timing
• Sequential Timing
• Time Delay Generation
• Pulse Generation
• Pulse Detector
• Pulse Width and Position
The circuits of the CA555 and CA555C may be triggered by
the falling edge of the waveform signal, and the output of
these circuits can source or sink up to a 200mA current or
drive TTL circuits.
Modulation
Ordering Information
These types are direct replacements for industry types in
packages with similar terminal arrangements e.g. SE555
PART NUMBER
(BRAND)
CA0555E
TEMP.
RANGE (oC)
PACKAGE
-55 to 125 8 Ld PDIP
PKG.
NO.
E8.3
and NE555, MC1555 and MC1455, respectively. The CA555
type circuits are intended for applications requiring premium
electrical performance. The CA555C type circuits are
CA0555M (555)
CA0555M96 (555)
-55 to 125 8 Ld SOIC
-55 to 125 8 Ld SOIC
M8.15 intended for applications requiring less stringent electrical
M8.15 characteristics.
CA0555T
-55 to 125 8 Pin Metal Can T8.C
CA0555CE
CA0555CM (555C)
0 to 70
0 to 70
8 Ld PDIP
8 Ld SOIC
E8.3
DaMt8a.1S5heet4U.com
CA0555CM96 (555C)
0 to 70 8 Ld SOIC
M8.15
CA0555CT
0 to 70 8 Pin Metal Can T8.C
LM555N
-55 to 125 8 Ld PDIP
E8.3
LM555CN
0 to 70 8 Ld PDIP
E8.3
NE555N
0 to 70 8 Ld PDIP
E8.3
NOTE: Denotes Tape and Reel
DataShee
Pinouts
CA555, CA555C (PDIP, SOIC)
LM555, LM555C, NE555 (PDIP)
TOP VIEW
GND 1
8 V+
TRIGGER 2
7 DISCHARGE
OUTPUT 3
6 THRESHOLD
RESET 4
5 CONTROL
VOLTAGE
CA555, CA555C (METAL CAN)
TOP VIEW
GND 1
V+
8
TAB
7 DISCHARGE
Functional Block Diagram
V+ TRIGGER
CONTROL
8 VOLTAGE 5 2
6
THRESHOLD
COMPAR
4
TRIGGER
COMPAR
FLIP-FLOP
3
OUTPUT
7
DataSheet4U.com
TRIGGER 2
6 THRESHOLD
OUTPUT 3
5 CONTROL
4 VOLTAGE
RESET
1
GND
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © Harris Corporation 1997
DataSheet4 U .com
8-3 DataSheet4U.com
File Number 834.4

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CA555, CA555C, LM555, LM555C, NE555
Electrical Specifications TA = 25oC, V+ = 5V to 15V Unless Otherwise Specified (Continued)
CA555, LM555 CA555C, LM555C, NE555
PARAMETER
SYMBOL TEST CONDITIONS
MIN TYP MAX MIN TYP MAX UNITS
Output Rise Time
tR
- 100 -
- 100 -
ns
Output Fall Time
tF
- 100 -
- 100 -
ns
NOTES:
2. When the output is in a high state, the DC supply current is typically 1mA less than the low state value.
3. The threshold current will determine the sum of the values of R1 and R2 to be used in Figure 4 (astable operation); the maximum total
R1 + R2 = 20M.
Schematic Diagram
V+
THRESHOLD
COMPARATOR
8
4.7K 830
4.7K
D1 D2
Q3 Q4
et4U.com
THRESHOLD
6
Q1 Q7
Q2 Q5
CONTROL
VOLTAGE
5
2
TRIGGER
4
RESET
7
DISCHARGE
1
V-
10K
RESET
Q8
Q6
DISCHARGE
NOTE: Resistance values are in ohms.
TRIGGER
COMPARATOR
FLIP-FLOP
OUTPUT
1K 5K
6.8K
Q10 Q16
Q19
Q20
OUTPUT
3.9K
3
7K
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4.7K
5K
Q11 Q12
Q9 Q13
5K
100K
Q15
Q14
D3 D4
Q18
Q17
220
4.7K
Q21
DataShee
100
Typical Applications
Reset Timer (Monostable Operation)
Figure 1 shows the CA555 connected as a reset timer. In this
mode of operation capacitor CT is initially held discharged by
a transistor on the integrated circuit. Upon closing the “start”
switch, or applying a negative trigger pulse to terminal 2, the
integral timer flip-flop is “set” and releases the short circuit
across CT which drives the output voltage “high” (relay ener-
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gized). The action allows the voltage across the capacitor to
increase exponentially with the constant t = R1CT. When the
voltage across the capacitor equals 2/3 V+, the comparator
resets the flip-flop which in turn discharges the capacitor rap-
idly and drives the output to its low state.
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LM555 電子部品, 半導体
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CA555, CA555C, LM555, LM555C, NE555
Typical Performance Curves (Continued)
10.0
V+ = 10V
1.0
0.1
125oC
25oC
TA = -55oC
25oC
125oC
10.0
V+ = 15V
1.0
125oC
25oC
0.1
-55oC
TA = -55oC
0.01
1
10
SINK CURRENT (mA)
FIGURE 11. OUTPUT VOLTAGE LOW STATE vs SINK
CURRENT
0.01
100 1
10
SINK CURRENT (mA)
FIGURE 12. OUTPUT VOLTAGE LOW STATE vs SINK
CURRENT
100
1.100
TA = 25oC
et4U.com
1.000
0.990
1.005
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0.995
0.980
0
2.5
5 7.5 10 12.5
SUPPLY VOLTAGE (V)
15 17.5
FIGURE 13. DELAY TIME vs SUPPLY VOLTAGE
0.985
-75 -50 -25
0 25 50 75
TEMPERATURE (oC)
100 125
FIGURE 14. DELAY TIME vs TEMPERATURE
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300
250
200 TA = -55oC
150
100 0oC
25oC
50 70oC
125oC
0 0.1 0.2 0.3 0.4
MINIMUM TRIGGER (PULSE) VOLTAGE (x V+) (NOTE)
NOTE: Where x is the decimal multiplier of the supply voltage.
FIGURE 15. PROPAGATION DELAY TIME vs TRIGGER VOLTAGE
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