|
|
UDA1380のメーカーはIntegrated Circuit Systemsです、この部品の機能は「Stereo audio coder-decoder for MD / CD and MP3」です。 |
部品番号 | UDA1380 |
| |
部品説明 | Stereo audio coder-decoder for MD / CD and MP3 | ||
メーカ | Integrated Circuit Systems | ||
ロゴ | |||
このページの下部にプレビューとUDA1380ダウンロード(pdfファイル)リンクがあります。 Total 30 pages
INTEGRATED CIRCUITS
DATA SHEET
UDA1380
Stereo audio coder-decoder
for MD, CD and MP3
Product specification
2002 Sep 16
1 Page Philips Semiconductors
Stereo audio coder-decoder
for MD, CD and MP3
Product specification
UDA1380
1 FEATURES
1.1 General
• 2.4 to 3.6 V power supply
• 5 V tolerant digital inputs (at 2.4 to 3.6 V power supply)
• 24-bit data path for Analog-to-Digital Converter (ADC)
and Digital-to-Analog Converter (DAC)
• Selectable control via L3-bus microcontroller interface
or I2C-bus interface; choice of 2 device addresses in
L3-bus and I2C-bus mode
Remark: This device does not have a static mode
• Supports sample frequencies from 8 to 55 kHz for the
ADC part, and 8 to 100 kHz for the DAC part. The ADC
cannot support DVD audio (96 kHz audio), only
Mini-Disc (MD), Compact-Disc (CD) and Moving Picture
Experts Group Layer-3 Audio (MP3). For playback
8 to 100 kHz is specified. DVD playback is supported
• Power management unit:
– Separate power control for ADC, Automatic Volume
Control (AVC), DAC, Phase Locked Loop (PLL) and
headphone driver
– Analog blocks like ADC and Programmable Gain
Amplifier (PGA) have a block to power-down the bias
circuits
– When ADC and/or DAC are powered-down, also the
clocks to these blocks are stopped to save power
Remark: By default, when the IC is powered-up, the
complete chip will be in the Power-down mode.
• ADC part and DAC part can run at different frequencies,
either system clock or Word Select PLL (WSPLL)
• ADC and PGA plus integrated high-pass filter to cancel
DC offset
• The decimation filter is equipped with a digital Automatic
Gain Control (AGC)
• Mono microphone input with Low Noise Amplifier (LNA)
of 29 dB fixed gain and Variable Gain Control (VGA)
from 0 to 30 dB in steps of 2 dB
• Integrated digital filter plus DAC
• Separate single-ended line output and one stereo
headphone output, capable of driving a 16 Ω load. The
headphone driver has a built-in short-circuit protection
with status bits which can be read out from the
L3-bus or I2C-bus interface
• Digital silence detection in the interpolator (playback)
with read-out status via L3-bus or I2C-bus interface
• Easy application.
1.2 Multiple format data input interface
• Slave BCK and WS signals
• I2S-bus format
• MSB-justified format compatible
• LSB-justified format compatible.
1.3 Multiple format data output interface
• Select option for digital output interface: either the
decimator output (ADC signal) or the output signal of the
digital mixer which is in the interpolator DSP
• Selectable master or slave BCK and WS signals for
digital ADC output
Remark: SYSCLK must be applied in WSPLL mode and
master mode
• I2S-bus format
• MSB-justified format compatible
• LSB-justified format compatible.
1.4 ADC front-end features
• ADC plus decimator can run at either WSPLL,
regenerating the clock from WSI signal, or on SYSCLK
• Stereo line input with PGA: gain range from 0 to 24 dB
in steps of 3 dB
• LNA with 29 dB fixed gain for mono microphone input,
including VGA with gain from 0 to 30 dB in steps of 2 dB
• Digital left and right independent volume control and
mute from +24 to −63.5 dB in steps of 0.5 dB.
2002 Sep 16
3
3Pages Philips Semiconductors
Stereo audio coder-decoder
for MD, CD and MP3
Product specification
UDA1380
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
Analog-to-digital converter (supply voltage 3.0 V)
Do
(THD+N)/S48
S/N48
αcs
digital output level
total harmonic distortion-
plus-noise to signal ratio at
fs = 48 kHz
signal-to-noise ratio at
fs = 48 kHz
channel separation
at 0 dB setting; Vi(rms) = 1.0 V
at −1 dBFS
at −60 dBFS; A-weighted
Vi = 0 V; A-weighted
− −1
− −85
− −37
− 97
− 100
LNA input plus analog-to-digital converter (supply voltage 3.0 V)
Vi(rms)
input voltage (RMS value)
at 0 dBFS digital output; 2.2 kΩ
source impedance
−−
(THD+N)/S48
S/N48
αcs
total harmonic
distortion-plus-noise to
signal ratio at fs = 48 kHz
signal-to-noise ratio at
fs = 48 kHz
channel separation
at 0 dB
at −60 dB; A-weighted
Vi = 0 V; A-weighted
− −74
− −25
− 85
− 70
Digital-to-analog converter (supply voltage 3.0 V)
Vo(rms)
(THD+N)/S48
(THD+N)/S96
S/N48
S/N96
αcs
output voltage (RMS value)
total harmonic
distortion-plus-noise to
signal ratio at fs = 48 kHz
total harmonic
distortion-plus-noise to
signal ratio at fs = 96 kHz
signal-to-noise ratio at
fs = 48 kHz
signal-to-noise ratio at
fs = 96 kHz
channel separation
at 0 dBFS digital input; note 1
at 0 dB
at −60 dB; A-weighted
at 0 dB
at −60 dB; A-weighted
code = 0; A-weighted
code = 0; A-weighted
− 0.9
− −88
− −40
− −80
− −37
− 100
− 97
− 90
AVC (line input via ADC input; output on line output and headphone driver; supply voltage 3.0 V)
Vi(rms)
(THD+N)/S48
S/N48
input voltage (RMS value)
total harmonic
distortion-plus-noise to
signal ratio at fs = 48 kHz
signal-to-noise ratio at
fs = 48 kHz
at 0 dB
at −60 dB; A-weighted
Vi = 0 V; A-weighted
− 150
− −80
− −28
− 87
−
−
−
−
−
35
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
dBFS
dB
dB
dB
dB
mV
dB
dB
dB
dB
V
dB
dB
dB
dB
dB
dB
dB
mV
dB
dB
dB
2002 Sep 16
6
6 Page | |||
ページ | 合計 : 30 ページ | ||
|
PDF ダウンロード | [ UDA1380 データシート.PDF ] |
データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。 |
部品番号 | 部品説明 | メーカ |
UDA1380 | Stereo audio coder-decoder for MD / CD and MP3 | Integrated Circuit Systems |
UDA1384 | Multichannel audio coder-decoder | NXP Semiconductors |