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TD87C51FB の電気的特性と機能

TD87C51FBのメーカーはIntelです、この部品の機能は「CHMOS Single-Chip 8-Bit Microcontroller」です。


製品の詳細 ( Datasheet PDF )

部品番号 TD87C51FB
部品説明 CHMOS Single-Chip 8-Bit Microcontroller
メーカ Intel
ロゴ Intel ロゴ 




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TD87C51FB Datasheet, TD87C51FB PDF,ピン配置, 機能
8XC51FX
CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLERS
Commercial/Express
87C51FA/83C51FA/80C51FA/87C51FB/83C51FB/87C51FC/83C51FC
See Table 1 for Proliferation Options
Y High Performance CHMOS
EPROM/ROM/CPU
Y 12/24/33 MHz Operation
Y Three 16-Bit Timer/Counters
Y Programmable Counter Array with:
- High Speed Output,
- Compare/Capture,
- Pulse Width Modulator,
- Watchdog Timer Capabilities
Y Up/Down Timer/Counter
Y Three Level Program Lock System
Y 8K/16K/32K On-Chip Program Memory
Y 256 Bytes of On-Chip Data RAM
Y Improved Quick Pulse Programming
Algorithm
Y Boolean Processor
Y 32 Programmable I/O Lines
Y 7 Interrupt Sources
Y Four Level Interrupt Priority
Y Programmable Serial Channel with:
- Framing Error Detection
- Automatic Address Recognition
Y TTL Compatible Logic Levels
Y 64K External Program Memory Space
Y 64K External Data Memory Space
Y MCS 51 Controller Compatible
Instruction Set
Y Power Saving Idle and Power Down
Modes
Y ONCE (On-Circuit Emulation) Mode
Y Extended Temperature Range Except
for 33 MHz Offering (b40 C to a85 C)
MEMORY ORGANIZATION
ROM
Device
83C51FA
83C51FB
83C51FC
EPROM
Version
87C51FA
87C51FB
87C51FC
ROMLESS
Version
80C51FA
80C51FA
80C51FA
ROM/
EPROM
Bytes
8K
16K
32K
RAM
Bytes
256
256
256
These devices can address up to 64 Kbytes of external program/data memory.
mThe Intel 87C51FA/8XC51FB/8XC51FC is a single-chip control oriented microcontroller which is fabricated on
oIntel's reliable CHMOS III-E technology. The Intel 83C51FA/80C51FA is fabricated on CHMOS III technology.
.cBeing a member of the MCS 51 controller family, the 8XC51FA/8XC51FB/8XC51FC uses the same powerful
instruction set, has the same architecture, and is pin-for-pin compatible with the existing MCS 51 controller
uproducts. The 8XC51FA/8XC51FB/8XC51FC is an enhanced version of the 8XC52/8XC54/8XC58. Its added
t4features make it an even more powerful microcontroller for applications that require Pulse Width Modulation,
High Speed I/O and up/down counting capabilities such as motor control.
eeFor the remainder of this document, the 8XC51FA, 8XC51FB, 8XC51FC will be referred to as the 8XC51FX,
hunless information applies to a specific device.
w.datasOther brands and names are the property of their respective owners.
Information in this document is provided in connection with Intel products. Intel assumes no liability whatsoever, including infringement of any patent or
wcopyright, for sale and use of Intel products except as provided in Intel's Terms and Conditions of Sale for such products. Intel retains the right to make
changes to these specifications at any time, without notice. Microcomputer Products may have minor variations to this specification known as errata.
w COPYRIGHT INTEL CORPORATION, 2004
July 2004
Order Number: 272322-005

1 Page





TD87C51FB pdf, ピン配列
8XC51FX
PROCESS INFORMATION
The 87C51FA/8XC51FB/8XC51FC is manufactured
on P629.0, a CHMOS III-E process. Additional pro-
Icnetesls®aQnduarleitlyiaSbyilsittyeminfoHramnadtbioonokis: available in the
http://developer.intel.com/design/quality/quality.htm
PACKAGES
Part
8XC51FX
Package Type
40-Pin Plastic DIP
40-Pin CERDIP
44-Pin PLCC
44-Pin QFP
DIP
272322 – 2
PLCC
272322 – 23
* Do not connect Reserved Pins.
QFP
Figure 2. Pin Connections
272322 – 24
3


3Pages


TD87C51FB 電子部品, 半導体
8XC51FX
Down is the last instruction executed. The on-chip
RAM and Special Function Registers retain their val-
ues until the Power Down mode is terminated.
272322 ±3
C1, C2 e 30 pF g10 pF for Crystals
For Ceramic Resonators, contact resonator manufacturer.
Figure 3. Oscillator Connections
On the 8XC51FX either hardware reset or external
interrupt can cause an exit from Power Down. Reset
redefines all the SFRs but does not change the on-
chip RAM. An external interrupt allows both the
SFRs and the on-chip RAM to retain their values.
To properly terminate Power Down the reset or ex-
ternal interrupt should not be executed before VCC is
restored to its normal operating level and must be
held active long enough for the oscillator to restart
and stabilize (normally less than 10 ms).
272322 ±4
With an external interrupt, INT0 or INT1 must be en-
abled and configured as level-sensitive. Holding the
pin low restarts the oscillator but bringing the pin
back high completes the exit. Once the interrupt is
serviced, the next instruction to be executed after
RETI will be the one following the instruction that put
the device into Power Down.
Figure 4. External Clock Drive Configuration DESIGN CONSIDERATION
IDLE MODE
The user's software can invoke the Idle Mode. When
the microcontroller is in this mode, power consump-
tion is reduced. The Special Function Registers and
the onboard RAM retain their values during Idle, but
the processor stops executing instructions. Idle
Mode will be exited if the chip is reset or if an en-
abled interrupt occurs. The PCA timer/counter can
optionally be left running or paused during Idle
Mode.
POWER DOWN MODE
To save even more power, a Power Down mode can
be invoked by software. In this mode, the oscillator
is stopped and the instruction that invoked Power
 Ambient light is known to affect the internal RAM
contents during operation. If the 87C51FX appli-
cation requires the part to be run under ambient
lighting, an opaque label should be placed over
the window to exclude light.
 When the idle mode is terminated by a hardware
reset, the device normally resumes program exe-
cution, from where it left off, up to two machine
cycles before the internal reset algorithm takes
control. On-chip hardware inhibits access to inter-
nal RAM in this event, but access to the port pins
is not inhibited. To eliminate the possibility of an
unexpected write when Idle is terminated by re-
set, the instruction following the one that invokes
Idle should not be one that writes to a port pin or
to external memory.
Table 2. Status of the External Pins during Idle and Power Down
Mode
Program
Memory
ALE
PSEN
PORT0
PORT1
PORT2
PORT3
Idle
Idle
Power Down
Power Down
Internal
External
Internal
External
1
1
0
0
1
Data
Data
Data
Data
1
Float
Data
Address
Data
0
Data
Data
Data
Data
0
Float
Data
Data
Data
NOTE:
For more detailed information on the reduced power modes refer to current Embedded Microcontrollers and Processors
Handbook Volume I, and Application Note AP-252 (Embedded Applications Handbook), ``Designing with the 80C51BH.''
6

6 Page



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共有リンク

Link :


部品番号部品説明メーカ
TD87C51FA

CHMOS Single-Chip 8-Bit Microcontroller

Intel
Intel
TD87C51FB

CHMOS Single-Chip 8-Bit Microcontroller

Intel
Intel
TD87C51FC

CHMOS Single-Chip 8-Bit Microcontroller

Intel
Intel
TD87C51Fx

CHMOS Single-Chip 8-Bit Microcontroller

Intel
Intel


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