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IW4029B の電気的特性と機能

IW4029BのメーカーはIK Semiconductorです、この部品の機能は「Binary or BCD-Decade Counter」です。


製品の詳細 ( Datasheet PDF )

部品番号 IW4029B
部品説明 Binary or BCD-Decade Counter
メーカ IK Semiconductor
ロゴ IK Semiconductor ロゴ 




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IW4029B Datasheet, IW4029B PDF,ピン配置, 機能
TECHNICAL DATA
Presettable Up/Down Counter
High-Voltage Silicon-Gate CMOS
IW4029B
The IW4029B consists of a four-stage binary or BCD-decade up/down
counter with provisions for look-ahead carry in both counting modes. The
inputs consists of a single CLOCK, CARRY IN,(CLOCK ENABLE),
BINARY/DECADE, UP/DOWN, PRESET ENABLE, and four individual
JAM signals. Q1, Q2, Q3, Q4 and a CARRY OUT signal are provided as
outputs.
A high PRESET ENABLE signal allows information on the JAM
INPUTS to preset the counter to any state asynchronously with the clock.
A low on each JAM line, when the PRESET-ENABLE signal is high, ORDERING INFORMATION
resets the counter to its zero count. The counter is advanced one count at
IW4029BN Plastic
the positive transition of the clock when the CARRY IN and PRESET
IW4029BD SOIC
ENABLE signals are low. Advancement is inhibited when the TA = -55° to 125° C for all packages
CARRY IN or PRESET ENABLE signals are high. The CARRY OUT
signal is normally high and goes low when the counter reaches its
maximum count in the UP mode or the minimum count in the DOWN
mode provided the CARRY IN signal is low. The CARRY IN signal in the low state can thus be considered a CLOCK
ENABLE. The CARRY IN terminal must be connected to GND when
not in use.
Binary counting is accomplished when the BINARY/DECADE
PIN ASSIGNMENT
input is high; the counter counts in the decade mode when the
BINARY/DECADE input is low. The counter counts up when the
UP/DOWN input is high, and down when the UP/DOWN input is low.
Parallel clocking provides synchronous control and hence faster
response from all counting outputs. Ripple-clocking allows for longer
clock input rise and fall times.
Operating Voltage Range: 3.0 to 18 V
Maximum input current of 1 µA at 18 V over full package-
temperature range; 100 nA at 18 V and 25°C
Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
LOGIC DIAGRAM
www.datasheet4u.com
PIN 16=VCC
PIN 8= GND
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IW4029B pdf, ピン配列
IW4029B
DC ELECTRICAL CHARACTERISTICS(Voltages Referenced to GND)
Symbol
Parameter
Test Conditions
VIH Minimum High-Level VOUT= 0.5 V or VCC - 0.5V
Input Voltage
VOUT= 1.0 V or VCC - 1.0 V
VOUT= 1.5 V or VCC - 1.5V
VIL Maximum Low -
VOUT= 0.5 V or VCC - 0.5V
Level Input Voltage VOUT= 1.0 V or VCC - 1.0 V
VOUT= 1.5 V or VCC - 1.5V
VOH Minimum High-Level VIN=GND or VCC
Output Voltage
VOL Maximum Low-Level VIN=GND or VCC
Output Voltage
IIN Maximum Input
Leakage Current
VIN= GND or VCC
ICC Maximum Quiescent VIN= GND or VCC
Supply Current
(per Package)
IOL Minimum Output
VIN= GND or VCC
Low (Sink) Current UOL=0.4 V
UOL=0.5 V
UOL=1.5 V
IOH Minimum Output
VIN= GND or VCC
High (Source) Current UOH=2.5 V
UOH=4.6 V
UOH=9.5 V
UOH=13.5 V
VCC Guaranteed Limit
V -55°C 25°C 125 Unit
°C
5.0 3.5
10 7
15 11
3.5 3.5 V
77
11 11
5.0 1.5
10 3
15 4
1.5 1.5 V
33
44
5.0 4.95 4.95 4.95 V
10 9.95 9.95 9.95
15 14.95 14.95 14.95
5.0 0.05
10 0.05
15 0.05
0.05 0.05 V
0.05 0.05
0.05 0.05
18 ±0.1 ±0.1 ±1.0 µA
5.0 5
10 10
15 20
20 100
5 150 µA
10 300
20 600
100 3000
5.0 0.64
10 1.6
15 4.2
mA
0.51 0.36
1.3 0.9
3.4 2.4
mA
5.0 -2
-1.6 -1.15
5.0 -0.64 -0.51 -0.36
10 -1.6 -1.3 -0.9
15 -4.2 -3.4 -2.4
3


3Pages


IW4029B 電子部品, 半導体
IW4029B
Figure 1. Switching Waveforms
Figure 2. Switching Waveforms
6

6 Page



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部品番号部品説明メーカ
IW4029B

Binary or BCD-Decade Counter

IK Semiconductor
IK Semiconductor


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