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UPD23C128040BL の電気的特性と機能

UPD23C128040BLのメーカーはNECです、この部品の機能は「(UPD23C128040BL / UPD23C128080BL) 128M-BIT MASK-PROGRAMMABLE ROM」です。


製品の詳細 ( Datasheet PDF )

部品番号 UPD23C128040BL
部品説明 (UPD23C128040BL / UPD23C128080BL) 128M-BIT MASK-PROGRAMMABLE ROM
メーカ NEC
ロゴ NEC ロゴ 




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UPD23C128040BL Datasheet, UPD23C128040BL PDF,ピン配置, 機能
DATA SHEET
MOS INTEGRATED CIRCUIT
µPD23C128040BL, 23C128080BL
128M-BIT MASK-PROGRAMMABLE ROM
16M-WORD BY 8-BIT (BYTE MODE) / 8M-WORD BY 16-BIT (WORD MODE)
PAGE ACCESS MODE
Description
The µPD23C128040BL and µPD23C128080BL are a 134,217,728 bits mask-programmable ROM. The word
organization is selectable (BYTE mode : 16,777,216 words by 8 bits, WORD mode : 8,388,608 words by 16 bits).
With 44-pin PLASTIC SOP package products, only WORD mode can be used; it is not possible to switch to BYTE
mode.
The active levels of OE (Output Enable Input) can be selected with mask-option.
The µPD23C128040BL and µPD23C128080BL are packed in 48-pin PLASTIC TSOP(I) and 44-pin PLASTIC SOP.
Features
Word organization
16,777,216 words by 8 bits (BYTE mode) Note
8,388,608 words by 16 bits (WORD mode) Note
Note With 44-pin PLASTIC SOP package products, only WORD mode can be used.
It is not possible to switch to BYTE mode.
Page access mode
BYTE mode : 8 byte random page access (µPD23C128040BL)
16 byte random page access (µPD23C128080BL)
WORD mode : 4 word random page access (µPD23C128040BL)
8 word random page access (µPD23C128080BL)
Operating supply voltage : VCC = 2.7 to 3.6 V
Operating supply
Access time /
Power supply current (Active mode)
voltage
Page access time
mA (MAX.)
VCC
ns (MAX.)
µPD23C128040BL µPD23C128080BL
3.0 V ± 0.3 V
120 / 25
50 70
3.3 V ± 0.3 V
100 / 25
55 75
Standby current
(CMOS level input)
µA (MAX.)
30
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. M16048EJ2V0DS00 (2nd edition)
Date Published February 2003 NS CP (K)
Printed in Japan
The mark shows major revised points.
2002

1 Page





UPD23C128040BL pdf, ピン配列
µPD23C128040BL, 23C128080BL
Pin Configurations
/xxx indicates active low signal.
WORD, /BYTE
A16
A15
A14
A13
A12
A11
A10
A9
A8
A19
A21
A20
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
/CE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48-pin PLASTIC TSOP(I) (12 x 18) (Normal bent)
[ µPD23C128040BLGY-xxx-MJH ]
[ µPD23C128080BLGY-xxx-MJH ]
Marking Side
48 GND
47 GND
46 O15, A–1
45 O7
44 O14
43 O6
42 O13
41 O5
40 O12
39 O4
38 VCC
37 VCC
36 A22
35 O11
34 O3
33 O10
32 O2
31 O9
30 O1
29 O8
28 O0
27 /OE or OE or DC
26 GND
25 GND
A0 to A22
: Address inputs
O0 to O7, O8 to O14 : Data outputs
O15, A–1
: Data output 15 (WORD mode),
LSB Address input (BYTE mode)
WORD, /BYTE
: Mode select
/CE : Chip Enable
/OE or OE
: Output Enable
VCC : Supply voltage
GND
: Ground
DC : Don’t Care
Remark Refer to Package Drawings for the 1-pin index mark.
Data Sheet M16048EJ2V0DS
3


3Pages


UPD23C128040BL 電子部品, 半導体
µPD23C128040BL, 23C128080BL
Input / Output Pin Functions
Pin name
Input / Output
Function
WORD, /BYTE
A0 to A22
(Address inputs)
O0 to O7, O8 to O14
(Data outputs)
O15, A1
(Data output 15,
LSB Address input)
/CE
(Chip Enable)
/OE or OE or DC
(Output Enable, Don’t Care)
VCC
Input
The pin for switching WORD mode and BYTE mode.
High level : WORD mode (8M-word by 16-bit)
Low level : BYTE mode (16M-word by 8-bit)
Input
Output
Output, Input
Input
Address input pins.
A0 to A22 are used differently in the WORD mode and the BYTE mode.
WORD mode (8M-word by 16-bit)
A0 to A22 are used as 23 bits address signals.
BYTE mode (16M-word by 8-bit)
A0 to A22 are used as the upper 23 bits of total 24 bits of address signal.
(The least significant bit (A1) is combined to O15.)
Data output pins.
O0 to O7, O8 to O14 are used differently in the WORD mode and the BYTE mode.
WORD mode (8M-word by 16-bit)
The lower 15 bits of 16 bits data outputs to O0 to O14.
(The most significant bit (O15) combined to A1.)
BYTE mode (16M-word by 8-bit)
8 bits data outputs to O0 to O7 and also O8 to O14 are high impedance.
O15, A1 are used differently in the WORD mode and the BYTE mode.
WORD mode (8M-word by 16-bit)
The most significant output data bus (O15).
BYTE mode (16M-word by 8-bit)
The least significant address bus (A1).
Chip activating signal.
When the OE is active, output states are following.
High level : High-Z
Low level : Data out
Input
Output enable signal. The active level of OE is mask option. The active level of OE
can be selected from high active, low active and Don’t care at order.
Supply voltage
GND
Ground
6 Data Sheet M16048EJ2V0DS

6 Page



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部品番号部品説明メーカ
UPD23C128040BL

(UPD23C128040BL / UPD23C128080BL) 128M-BIT MASK-PROGRAMMABLE ROM

NEC
NEC


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