IS61LV12824 Datasheet PDF - Integrated Silicon Solution
| Part Number | IS61LV12824 | |
| Description | 128K x 24 HIGH-SPEED CMOS STATIC RAM WITH 3.3V SUPPLY | |
| Manufacturers | Integrated Silicon Solution | |
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IS61LV12824
128K x 24 HIGH-SPEED CMOS STATIC RAM
WITH 3.3V SUPPLY
ISSI®
JUNE 2005
FEATURES
• High-speed access time: 8, 10 ns
• CMOS low power operation
— 756 mW (max.) operating @ 8 ns
— 36 mW (max.) standby @ 8 ns
• TTL compatible interface levels
• Single 3.3V power supply
• Fully static operation: no clock or refresh
required
• Three state outputs
• Available in 119-pin Plastic Ball Grid Array
(PBGA) and 100-pin TQFP packages.
• Industrial temperature available
• Lead-free available
FUNCTIONAL BLOCK DIAGRAM
DESCRIPTION
The ISSI IS61LV12824 is a high-speed, static RAM organized
as 131,072 words by 24 bits. It is fabricated using ISSI's high-
performance CMOS technology. This highly reliable process
coupled with innovative circuit design techniques, yields ac-
cess times as fast as 8 ns with low power consumption.
When CE1, CE2 are HIGH and CE2 is LOW (deselected), the
device assumes a standby mode at which the power dissipa-
tion can be reduced down with CMOS input levels.
Easy memory expansion is provided by using Chip Enable
and Output Enable inputs, CE1, CE2, CE2 and OE. The active
LOW Write Enable (WE) controls both writing and reading of
the memory.
The IS61LV12824 is packaged in the JEDEC standard
119-pin PBGA and 100-pin TQFP.
A0-A16
VCC
GND
I/O0-I/O23
DECODER
128K x 24
MEMORY ARRAY
I/O
DATA
CIRCUIT
COLUMN I/O
CE2
CE1
CE2
OE
WE
CONTROL
CIRCUIT
Copyright © 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability
arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any
published information and before placing orders for products.
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. D
06/22/05
1
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IS61LV12824
ISSI®
POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)
Symbol
ICC
ISB1
ISB2
Parameter
Vcc Dynamic Operating
Supply Current
TTL Standby Current
(TTL Inputs)
CMOS Standby
Current (CMOS Inputs)
Test Conditions
VCC = Max.,
IOUT = 0 mA, f = fMAX
Com.
Ind.
VCC = Max.,
Com.
VIN = VIH or VIL, f = max.
Ind.
CE1, CE2, ≥ VIH, CE2 ≤ VIL
VCC = Max.,
Com.
CE1, CE2 ≥ VCC – 0.2V,
Ind.
CE2 ≤ 0.2V, VIN ≥ VCC – 0.2V,
or VIN ≤ 0.2V, f = 0
-8 ns
Min. Max.
— 210
— 240
— 70
— 80
— 10
— 20
-10 ns
Min. Max.
— 180
— 210
— 50
— 55
— 10
— 20
Note:
1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
CAPACITANCE(1)
Symbol Parameter
Conditions
Max.
Unit
CIN
COUT
Input Capacitance
Input/Output Capacitance
VIN = 0V
VOUT = 0V
6 pF
8 pF
Note:
1. Tested initially and after any design or process changes that may affect these parameters.
Unit
1mA
mA
2
mA
3
4
5
6
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Level
Output Load
AC TEST LOADS
OUTPUT
ZO = 50Ω
Figure 1
Unit
0V to 3.0V
2 ns
1.5V
See Figures 1 and 2
50Ω
1.5V
3.3V
319 Ω
OUTPUT
5 pF
Including
jig and
scope
Figure 2
353 Ω
7
8
9
10
11
12
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. D
06/22/05
5
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Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for IS61LV12824 electronic component. |
| Information | Total 13 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ IS61LV12824.PDF Datasheet ] | |
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