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PDF IRLMS1503 Data sheet ( Hoja de datos )

Número de pieza IRLMS1503
Descripción HEXFET Power MOSFET
Fabricantes International Rectifier 
Logotipo International Rectifier Logotipo



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No Preview Available ! IRLMS1503 Hoja de datos, Descripción, Manual

l Generation V Technology
l Micro6 Package Style
l Ultra Low RDS(on)
l N-Channel MOSFET
Description
Fifth Generation HEXFET® power MOSFETs from
International Rectifier utilize advanced processing
techniques to achieve extremely low on-resistance
per silicon area. This benefit, combined with the fast
switching speed and ruggedized device design that
HEXFET® power MOSFETs are well known for,
provides the designer with an extremely efficient and
reliable device for use in a wide variety of applications.
The Micro6package with its customized leadframe
produces a HEXFET® power MOSFET with RDS(on)
60% less than a similar size SOT-23. This package is
ideal for applications where printed circuit board space
is at a premium. It's unique thermal design and RDS(on)
reduction enables a current-handling increase of
nearly 300% compared to the SOT-23.
PD - 91508D
IRLMS1503
HEXFET® Power MOSFET
D1
A
6D
D2
5D
G3
4S
Top View
VDSS = 30V
RDS(on) = 0.10
Micro6
Absolute Maximum Ratings
ID @ TA = 25°C
ID @ TA = 70°C
IDM
PD @TA = 25°C
VGS
dv/dt
TJ, TSTG
Parameter
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current 
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery dv/dt ‚
Junction and Storage Temperature Range
Max.
3.2
2.6
18
1.7
13
± 20
5.0
-55 to + 150
Units
A
W
mW/°C
V
V/ns
°C
Thermal Resistance Ratings
RθJA
Parameter
Maximum Junction-to-Ambient „
www.irf.com
Min.
–––
Typ.
–––
Max
75
Units
°C/W
1
3/17/04

1 page




IRLMS1503 pdf
IRLMS1503
10V
QGS
VG
QG
QGD
Charge
VDS
VGS
RG
RD
D.U.T.
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
+
-
VDD
Fig 9a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50K
12V .2µF
.3µF
D.U.T.
+
-VDS
VGS
3mA
IG ID
Current Sampling Resistors
Fig 9b. Gate Charge Test Circuit
Fig 10a. Switching Time Test Circuit
VDS
90%
10%
VGS
td(on) tr
td(off) tf
Fig 10b. Switching Time Waveforms
100
D = 0.50
0.20
10 0.10
0.05
0.02
1 0.01
0.1
0.00001
PDM
SINGLE PULSE
(THERMAL RESPONSE)
0.0001
0.001
t1
t2
Notes:
1. Duty factor D = t1 / t 2
2. Peak T J = P DM x Z thJA + TA
0.01 0.1
1
t1, Rectangular Pulse Duration (sec)
10
100
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
www.irf.com
4

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