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P9NB60FP PDF Data sheet ( 特性 )

部品番号 P9NB60FP
部品説明 STP9NB60FP
メーカ ST Microelectronics
ロゴ ST Microelectronics ロゴ 



Total 9 pages
		

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P9NB60FP Datasheet, P9NB60FP PDF,ピン配置, 機能
STP9NB60
® STP9NB60FP
N - CHANNEL 600V - 0.7- 9A TO-220/TO220FP
PowerMESHMOSFET
TYPE
VDSS
RDS(on)
ID
ST P9N B60
ST P9N B60 FP
600 V
600 V
< 0.8
< 0.8
9.0 A
9.0 A
s TYPICAL RDS(on) = 0.7
s EXTREMELY HIGH dv/dt CAPABILITY
s 100% AVALANCHE TESTED
s VERY LOW INTRINSIC CAPACITANCES
s GATE CHARGE MINIMIZED
DESCRIPTION
Using the latest high voltage MESH OVERLAY
process, STMicroelectronics has designed an
advanced family of power MOSFETs with
outstanding performances. The new patent
pending strip layout coupled with the Company’s
proprietary edge termination structure, gives the
lowest RDS(on) per area, exceptional avalanche
and dv/dt capabilities and unrivalled gate charge
and switching characteristics.
3
2
1
TO-220
3
2
1
TO-220FP
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
s HIGH CURRENT, HIGH SPEED SWITCHING
s SWITCH MODE POWER SUPPLIES (SMPS)
s DC-AC CONVERTERS FOR WELDING
EQUIPMENT AND UNINTERRUPTIBLE
POWER SUPPLIES AND MOTOR DRIVE
ABSOLUTE MAXIMUM RATINGS
Sy mb o l
Parameter
V DS
V DGR
VGS
ID
ID
IDM ()
Ptot
Drain-source Voltage (VGS = 0)
Drain- gate Voltage (RGS = 20 k)
Gate-source Voltage
Drain Current (cont inuous) at Tc = 25 oC
Drain Current (cont inuous) at Tc = 100 oC
Drain Current (pulsed)
Total Dissipation at Tc = 25 oC
Derating F actor
dv/dt(1) Peak Diode Recovery voltage slope
VISO Insulation Withstand Voltage (DC)
Ts tg St orage Temperature
Tj Max. Operating Junction Temperature
() Pulse width limited by safe operating area
(*) Limited only by maximum temperature allowed
January 2000
Value
STP9NB60 STP9NB60FP
600
600
± 30
9.0 9.0(*)
5.7 5.7(*)
36 36
125 40
1.0 0.32
4.5 4.5
2000
-65 to 150
150
( 1) ISD 9A, di/dt 200 A/µs, VDD V(BR)DSS, Tj TJMAX
Un it
V
V
V
A
A
A
W
W /o C
V/ns
V
oC
oC
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