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PDF HD151BF854 Data sheet ( Hoja de datos )
| Número de pieza | HD151BF854 | |
| Descripción | 2.5 V PLL Clock Buffer for DDR Application | |
| Fabricantes | Renesas Technology | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de HD151BF854 (archivo pdf) en la parte inferior de esta página. Total 13 Páginas | ||
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To all our customers
Regarding the change of names mentioned in the document, such as Hitachi
Electric and Hitachi XX, to Renesas Technology Corp.
The semiconductor operations of Mitsubishi Electric and Hitachi were transferred to Renesas
Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog
and discrete devices, and memory chips other than DRAMs (flash memory, SRAMs etc.)
Accordingly, although Hitachi, Hitachi, Ltd., Hitachi Semiconductors, and other Hitachi brand
names are mentioned in the document, these names have in fact all been changed to Renesas
Technology Corp. Thank you for your understanding. Except for our corporate trademark, logo and
corporate statement, no changes whatsoever have been made to the contents of the document, and
these changes do not constitute any alteration to the contents of the document itself.
Renesas Technology Home Page: http://www.renesas.com
Renesas Technology Corp.
Customer Support Dept.
April 1, 2003
1 page  
Pin Arrangement
HD151BF854
Y0 1
Y0 2
VDD 3
Y1 4
Y1 5
GND 6
NC 7
CLKIN 8
NC 9
AVDD 10
AGND 11
VDD 12
Y2 13
Y2 14
28 GND
27 Y5
26 Y5
25 Y4
24 Y4
23 VDD
22 NC
21 NC
20 FBIN
19 FBOUT
18 NC
17 Y3
16 Y3
15 GND
(Top view)
Rev.4, Jan. 2003, page 3 of 11
5 Page 
HD151BF854
Yn Zo = 60 Ω
*1
RT=
C = 14 pF
120 Ω
Yn Zo = 60 Ω
*1
C = 14 pF
Note: 1. SDRAM Cin 3.5 pF ×4
Figure 1 Clock outputs test circuit
Yn
Yn
tcycle n
tcycle n+1
t CC = (tcycle n) - (tcycle n+1)
Figure 2 Cycle to cycle jitter
Yx
Yx
Yy
Yy
tsk
Figure 3 Output clock skew (Differential clock output)
Rev.4, Jan. 2003, page 9 of 11
11 Page | ||
| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet HD151BF854.PDF ] | |
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