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PDF 74V2T241 Data sheet ( Hoja de datos )
| Número de pieza | 74V2T241 | |
| Descripción | DUAL BUS BUFFER NON INVERTED (3-STATE) | |
| Fabricantes | ST Microelectronics | |
| Logotipo |  |
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74V2T241
DUAL BUS BUFFER NON INVERTED (3-STATE)
s HIGH SPEED: tPD = 3.8ns (TYP.) at VCC = 5V
s LOW POWER DISSIPATION:
ICC = 1µA(MAX.) at TA = 25°C
s POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
s COMPATIBLE WITH TTL LEVEL:
VIH=2.0V(MIN), VIL=0.8V(MAX)
s SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 8mA (MIN) at VCC = 4.5V
s BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
s OPERATING VOLTAGE RANGE:
VCC(OPR) = 4.5V to 5.5V
s IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74V2T241 is an advanced high-speed CMOS
DUAL BUS BUFFER NON INVERTER fabricated
with sub-micron silicon gate and double-layer
metal wiring C2MOS technology.
It has one active-high and one active-low output
enable. Power down protection is provided on all
SOT23-8L
ORDER CODES
PACKAGE
SOT23-8L
T&R
74V2T241STR
inputs and outputs and 0 to 7V can be accepted
on inputs with no regard to the supply voltage.
This device can be used to interface 5V to 3V
systems and it is ideal for portable applications
like personal digital assistant, camcorder and all
battery-powered equipment.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them ESD immunity and transient excess voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
June 2003
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1 page  
WAVEFORM 2: OUTPUT ENABLE AND DISABLE TIME (f=1MHz; 50% duty cycle)
74V2T241
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5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet 74V2T241.PDF ] | |
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| Número de pieza | Descripción | Fabricantes |
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