PDF UPA2702TP Data sheet ( Hoja de datos )

Número de pieza	UPA2702TP
Descripción	SWITCHING N- AND P-CHANNEL POWER MOS FET
Fabricantes	NEC
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No Preview Available ! DATA SHEET MOS FIELD EFFECT TRANSISTOR µPA2702TP SWITCHING N-CHANNEL POWER MOS FET DESCRIPTION The µPA2702TP, which has a heat spreader, is N-Channel MOS Field Effect Transistor designed for DC/DC converter and power management applications of notebook computers. PACKAGE DRAWING (Unit: mm) 85 1, 2, 3 ; Source 4 ; Gate 5, 6, 7, 8, 9 ; Drain FEATURES • Low on-state resistance RDS(on)1 = 9.5 mΩ MAX. (VGS = 10 V, ID = 7.0 A) RDS(on)2 = 15.1 mΩ MAX. (VGS = 4.5 V, ID = 7.0 A) • Low Ciss: Ciss = 900 pF TYP. (VDS = 10 V, VGS = 0 V) • Small and surface mount package (Power HSOP8) 14 5.2 +0.17 –0.2 0.8 ±0.2 S 6.0 ±0.3 4.4 ±0.15 1.27 TYP. 0.40 +0.10 –0.05 14 0.12 M 0.10 S ORDERING INFORMATION PART NUMBER µPA2702TP PACKAGE Power HSOP8 2.0 ±0.2 9 4.1 MAX. 85 ABSOLUTE MAXIMUM RATINGS (TA = 25°C, Unless otherwise noted, All terminals are connected.) Drain to Source Voltage (VGS = 0 V) VDSS 30 V Gate to Source Voltage (VDS = 0 V) Drain Current (DC) (TC = 25°C) Drain Current (DC) (TA = 25°C) Note1 Drain Current (pulse) Note2 Total Power Dissipation (TC = 25°C) Total Power Dissipation (TA = 25°C) Note1 VGSS ID(DC)1 ID(DC)2 ID(pulse) PT1 PT2 ±20 ±35 ±14 ±65 22 3 V A A A W W EQUIVALENT CIRCUIT Drain Gate Body Diode Channel Temperature Storage Temperature Single Avalanche Current Note3 Single Avalanche Energy Note3 Tch 150 °C Tstg –55 to +150 °C IAS 16 A EAS 25.6 mJ Gate Protection Diode Source Notes 1. Mounted on a glass epoxy board (1 inch x 1 inch x 0.8 mm), PW = 10 sec 2. PW ≤ 10 µs, Duty Cycle ≤ 1% 5 3. Starting Tch = 25°C, VDD = 15 V, RG = 25 Ω, L = 100 µH, VGS = 20 → 0 V Remark The diode connected between the gate and source of the transistor serves as a protector against ESD. When this device actually used, an additional protection circuit is extemally required if a voltage exceeding the rated voltage may be applied to this device. The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all devices/types available in every country. Please check with local NEC representative for availability and additional information. Document No. G15845EJ2V0DS00 (2nd edition) Date Published May 2002 NS CP(K) Printed in Japan The mark 5 shows major revised points. © 2002 1 page DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE 25 Pulsed 20 VGS = 4 V 15 4.5 V 10 10 V 5 0 −50 −25 0 25 50 75 100 125 150 175 Tch - Channel Temperature - ˚C 10000 CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE 1000 100 Ciss Coss Crss VGS = 0 V 10 f = 1 MHz 0.1 1 10 VDS - Drain to Source Voltage - V 100 1000 REVERSE RECOVERY TIME vs. DRAIN CURRENT di/dt = 100 A/ µs VGS = 0 V 100 10 1 0.1 1 10 IF - Drain Current - A 100 µPA2702TP SOURCE TO DRAIN DIODE FORWARD VOLTAGE 100 Pulsed VGS = 0 V 10 1 0.1 0.01 0 0.2 0.4 0.6 0.8 1.0 VSD - Source to Drain Voltage - V 1.2 SWITCHING CHARACTERISTICS 100 td(off) tf 10 td(on) tr VDD = 15 V VGS = 10 V RG = 10 Ω 1 0.1 1 10 ID - Drain Current - A 100 DYNAMIC INPUT/OUTPUT CHARACTERISTICS 40 8 35 30 VDD = 24 V 15 V 25 6 V VGS 7 6 5 20 4 15 3 10 2 5 VDS 1 ID = 13 A 00 0 2 4 6 8 10 12 14 16 18 20 QG - Gate Charge - nC Data Sheet G15845EJ2V0DS 5 5 Page

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