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UPA2713GRのメーカーはNECです、この部品の機能は「SWITCHING N- AND P-CHANNEL POWER MOS FET」です。 |
部品番号 | UPA2713GR |
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部品説明 | SWITCHING N- AND P-CHANNEL POWER MOS FET | ||
メーカ | NEC | ||
ロゴ | |||
このページの下部にプレビューとUPA2713GRダウンロード(pdfファイル)リンクがあります。 Total 7 pages
DATA SHEET
MOS FIELD EFFECT TRANSISTOR
µPA2713GR
SWITCHING
P-CHANNEL POWER MOS FET
DESCRIPTION
The µPA2713GR is P-channel MOS Field Effect Transistor
designed for power management applications of notebook
computers and Li-ion battery protection circuit.
FEATURES
• Low on-state resistance
RDS(on)1 = 16 mΩ MAX. (VGS = −10 V, ID = −4.0 A)
RDS(on)2 = 25 mΩ MAX. (VGS = −4.5 V, ID = −4.0 A)
RDS(on)3 = 30 mΩ MAX. (VGS = −4.0 V, ID = −4.0 A)
• Low Ciss: Ciss = 1600 pF TYP.
• Small and surface mount package (Power SOP8)
ORDERING INFORMATION
PART NUMBER
µPA2713GR
PACKAGE
Power SOP8
PACKAGE DRAWING (Unit: mm)
85
1, 2, 3 : Source
4 : Gate
5, 6, 7, 8: Drain
14
5.37 MAX.
6.0 ±0.3
4.4
1.27 0.78 MAX.
0.40
+0.10
–0.05
0.12 M
0.5 ±0.2
0.8
0.10
ABSOLUTE MAXIMUM RATINGS (TA = 25°C, All terminals are connected.)
Drain to Source Voltage (VGS = 0 V)
VDSS
−30
V
Gate to Source Voltage (VDS = 0 V)
Drain Current (DC)
Drain Current (pulse) Note1
Total Power Dissipation Note2
Total Power Dissipation Note3
VGSS
ID(DC)
ID(pulse)
PT1
PT2
m20
m8
m32
2
2
V
A
A
W
W
Channel Temperature
Tch 150
°C
Storage Temperature
Single Avalanche Current Note4
Single Avalanche Energy Note4
Tstg −55 to +150
IAS 8
EAS 6.4
°C
A
mJ
EQUIVALENT CIRCUIT
Drain
Gate
Body
Diode
Notes 1. PW ≤ 10 µs, Duty Cycle ≤ 1%
2. Mounted on ceramic substrate of 1200 mm2 x 2.2 mm
3. Mounted on a glass epoxy board (1 inch x 1 inch x 0.8 mm), PW = 10 sec
4. Starting Tch = 25°C, VDD = −15 V, RG = 25 Ω, L = 100 µH, VGS = −20 → 0 V
Source
Remark Strong electric field, when exposed to this device, can cause destruction of the gate oxide and ultimately
degrade the device operation. Steps must be taken to stop generation of static electricity as much as
possible, and quickly dissipate it once, when it has occurred.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. G15981EJ1V0DS00 (1st edition)
Date Published January 2003 NS CP(K)
Printed in Japan
2002
1 Page µPA2713GR
TYPICAL CHARACTERISTICS (TA = 25°C, All terminals are connected.)
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
120
100
80
60
40
20
0
0 25 50 75 100 125 150 175
TA - Ambient Temperature - °C
TOTAL POWER DISSIPATION vs.
AMBIENT TEMPERATURE
2.8
Mounted on ceramic substrate of
2.4 1200 mm2 x 2.2 mm
2
1.6
1.2
0.8
0.4
0
0 25 50 75 100 125 150 175
TA - Ambient Temperature - °C
FORWARD BIAS SAFE OPERATING AREA
- 100
ID(pulse)
PW = 100 µs
- 10
ID(DC)
1 ms
- 1 RDS(on) Lim ited 10 m s
(VGS = 10 V) 100 ms
- 0.1
Power Dissipation Lim ited
- 0.01
Single pulse
Mounted on ceramic substrate of
1200 m m2 x 2.2 mm
- 0.01
- 0.1
-1
- 10
DC
- 100
VDS - Drain to Source Voltage - V
1000
100
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
Rth(ch-A) = 62.5°C/W
10
1
0.1
0.01
100 µ
1m
10 m
Single pulse
Mounted on ceramic substrate of 1200 mm2 x 2.2 mm
100 m
1
10 100 1000
PW - Pulse Width - s
Data Sheet G15981EJ1V0DS
3
3Pages - 100
SINGLE AVALANCHE CURRENT vs.
INDUCTIVE LOAD
- 10
IAS = −8 A
EAS = 6.4 mJ
-1
- 0.1
VDD = −15 V
RG = 25 Ω
VGS = −20 → 0 V
Starting Tch = 25°C
0.01 0.1
1
L - Inductive Load - mH
10
µPA2713GR
SINGLE AVALANCHE ENERGY
DERATING FACTOR
120
100
VDD = −15 V
RG = 25 Ω
VGS = −20 → 0 V
IAS ≤ −8 A
80
60
40
20
0
25 50 75 100 125 150
Starting Tch - Starting Channel Temperature - °C
6 Data Sheet G15981EJ1V0DS
6 Page | |||
ページ | 合計 : 7 ページ | ||
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PDF ダウンロード | [ UPA2713GR データシート.PDF ] |
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部品番号 | 部品説明 | メーカ |
UPA2713GR | SWITCHING N- AND P-CHANNEL POWER MOS FET | NEC |