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Número de pieza | IRFD120 | |
Descripción | N-Channel Power MOSFET / Transistor | |
Fabricantes | Fairchild Semiconductor | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de IRFD120 (archivo pdf) en la parte inferior de esta página. Total 7 Páginas | ||
No Preview Available ! Data Sheet
January 2002
IRFD120
1.3A, 100V, 0.300 Ohm, N-Channel
Power MOSFET
This advanced power MOSFET is designed, tested, and
guaranteed to withstand a specified level of energy in the
breakdown avalanche mode of operation. These are
N-Channel enhancement mode silicon gate power field
effect transistors designed for applications such as switching
regulators, switching convertors, motor drivers, relay drivers,
and drivers for high power bipolar switching transistors
requiring high speed and low gate drive power. They can be
operated directly from integrated circuits.
Formerly developmental type TA17401.
Ordering Information
PART NUMBER
PACKAGE
BRAND
IRFD120
HEXDIP
IRFD120
NOTE: When ordering, use the entire part number.
Features
• 1.3A, 100V
• rDS(ON) = 0.300Ω
• Single Pulse Avalanche Energy Rated
• SOA is Power Dissipation Limited
• Nanosecond Switching Speeds
• Linear Transfer Characteristics
• High Input Impedance
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
D
G
S
Packaging
HEXDIP
GATE
DRAIN
SOURCE
©2002 Fairchild Semiconductor Corporation
IRFD120 Rev. B
1 page IRFD120
Typical Performance Curves Unless Otherwise Specified (Continued)
5
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
4
3
TJ = -55oC
TJ = 25oC
TJ = 125oC
2
1
0
0 4 8 12 16 20
ID, DRAIN CURRENT (A)
FIGURE 11. TRANSCONDUCTANCE vs DRAIN CURRENT
2
PULSE DURATION = 80µs
102 DUTY CYCLE = 0.5% MAX
5
2
10
5 TJ = 150oC
2
TJ = 25oC
0.1
0
123
VSD, SOURCE TO DRAIN VOLTAGE (V)
FIGURE 12. SOURCE TO DRAIN DIODE VOLTAGE
4
20
ID = 5.2A
15
10
VDS = 20V
VDS = 50V
VDS = 80V
5
0
0 2 4 6 8 10
QG, GATE CHARGE (nC)
FIGURE 13. GATE TO SOURCE VOLTAGE vs GATE CHARGE
Test Circuits and Waveforms
VARY tP TO OBTAIN
REQUIRED PEAK IAS
VGS
tP
0V
RG
VDS
L
DUT
+
VDD
-
IAS
0.01Ω
0
tP
IAS
BVDSS
VDS
VDD
tAV
FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 15. UNCLAMPED ENERGY WAVEFORMS
©2002 Fairchild Semiconductor Corporation
IRFD120 Rev. B
5 Page |
Páginas | Total 7 Páginas | |
PDF Descargar | [ Datasheet IRFD120.PDF ] |
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