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16MX16TI PDF Datasheet ( 特性, スペック, ピン接続図 )

部品番号 16MX16TI
部品説明 DPSD16MX16TI
メーカ ETC
ロゴ ETC ロゴ 



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16MX16TI Datasheet, 16MX16TI PDF,ピン配置, 機能
16Mx16, 7.5 - 15ns, P12, M-Densus
30A232-00 A
M-Densus
256 Megabit Synchronous DRAM
High Density Memory Device
DPSD16MX16TY5
ADVANCED INFORMATION
DESCRIPTION:
The M-Densus series is a family of interchangeable memory modules. The 256 Megabit SDRAM is a member of
this family which utilizes the new and innovative space saving TSOP stacking technology. The modules are
constructed with 8 Meg x 16 SDRAMs.
This 128 Megabit based M-Densus module, the
DPSD16MX16TY5 has been designed to fit in the same
footprint as the 8 Meg x 16 SDRAM TSOP monolithic and
128 Megabit SDRAM based family of M-Densus modules.
This allows the memory board designer to upgrade the
memory in their products without redesigning the
memory board, thus saving time and money.
PIN-OUT DIAGRAM
FEATURES:
Configuration Available:
16 Meg x 16 bit (with two Chip Selects)
Clock F6re6q[1u],e8n3c[y1:], 100, 125[2], 133[2] MHz (max.)
PC100 and PC133 Compatible
3.3V Supply
LVTTL Compatible I/O
Four Bank Operation
Programmable Burst Type, Burst Length,
and CAS Latency
4096 Cycles / 64 ms
Auto and Self Refresh
Package: TSOP Leadless Stack
NOTES: [1] Available in Industrial Temperature Ranges Only.
[2] Available in Commercial Temperature Range Only.
FUNCTIONAL BLOCK DIAGRAM
A0 - A11
BA0, BA1
DQ0 - DQ15
CAS
RAS
WE
UDQM,
LDQM
CKE
CLK
CS0-CS1
VCC/VSS
VCCQ/VSSQ
N.C./RFU
PIN NAMES
Row Address: A0 - A11
Column Address: A0 - A8
Bank Select Address
Data In / Data Out
Column Address Strobes
Row Address Enables
Data Write Enable
Upper & Lower
Data Input/Output Mask
Clock Enable
System Clock
Chip Selects
Power Supply/Ground
Data Output Power/Ground
No Connect
Reserved for Future Use
30A232-00
REV. A
This document contains information on a product under consideration for
development at Dense-Pac Microsystems, Inc. Dense-Pac reserves the right
to change or discontinue information on this product without prior notice.
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