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PDF MN673794 Data sheet ( Hoja de datos )
| Número de pieza | MN673794 | |
| Descripción | LSI FOR MPEG | |
| Fabricantes | Panasonic | |
| Logotipo |  |
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LSI for MPEG
MN673794
1. Overview
This IC is used to process a variety of items including the following ones: NTSC/PAL signal (Y/C and
composite video) I/O, 3D Y/C separation, TBC, DD conversion, frame sync, sync/clock generation, Rec
656 I/O.
Features
▪ Analog input block
Composite video/Component Y input (10 bits at 27.0 MHz)
Component C input (10 bits at 27.0 MHz)
▪ Analog control block
AGC (Auto Gain Control), clamp control, ACC (Auto Color Control)
▪ Digital I/O block
Digital video I/O (ITU-R Rec 656: Y/Cr/Cb multiple, 8 bits at 27 MHz)
Digital video input clock must be synchronized with the system clock of 27 MHz.
▪ Signal processing block
3D Y/C separation (image movement adaptive processing: NTSC), 2D Y/C separation (PAL)
TBC (Time Base Corrector) processing (velocity error correction/jitter correction)
Frame sync processing (See Note.)
NR processing (Y/C recursive NR)
Y/C separation is performed only in two dimensions (due to memory sharing) when the NR function is
in use.
▪ Copyright VBLK detection
Macrovision (AGC pulse and color stripe) detection
VBID detection
Closed caption detection
WSS detection
Note: This IC uses a 27-MHz fixed clock. Therefore, input signals into the IC are not synchronized with
output signals from the IC. Therefore, a frame-skip or frame-hold occurs to standard and nonstandard
signals, the frequency of occurrence of which varies with the difference in frame frequency between
input signals and the 27-MHz fixed clock.
If the user does not want the occurrence of any frame-skip or frame-hold to standard signals,
externally generate 27-MHz clock pulses synchronized with the frames of the input signals, and input
the clock pulses into the IC.
A frame-skip refers to loss of the image in a single frame.
A frame-hold refers to the duplicated output of the image in the previous frame. *1
Publication date: January 2003
SDF00032BEM
1
1 page  
MN673794
Table 2.2 Pin Descriptions (3/4)
Pin No. Pin name
105 TEST1
106 TEST0
107 VDDI
108 VSS
109 MINTC1
110 MINTIN1
111 MINTEST
112 VDD3
113 PDRAM0
114 PDRAM1
115 VSSDRAM1
116 VDDDRAM1
117 NTDRAM
118 VSS
119 VDDI
120 CLK27I
121 VSS
122 R656IN7
123 R656IN6
124 VDD3
125 R656IN5
126 R656IN4
127 VSS
128 VDDDRAM2
129 VSSDRAM2
130 R656IN3
131 R656IN2
132 VDD3
133 R656IN1
134 R656IN0
135 VSS
136 CLK27O
137 VDDI
138 R656OUT7
139 R656OUT6
140 VSS
141 R656OUT5
142 R656OUT4
143 VDD3
144 R656OUT3
145 R656OUT2
146 VSS
147 R656OUT1
148 R656OUT0
149 VDDI
150 VSS
151 HD
152 VD
153 VDD3
154 APCE
155 VSS
156 CSYNCO
I/O Voltage
Type
Drive
Function
I 3.3 V CMOS-100 kΩ PD - Test mode (open or VSS)
I 3.3 V CMOS-100 kΩ PD - Test mode (LSB) (open or VSS)
Power supply 1.8 V
-
- Internal digital use
GND
-
-
- Digital use
I 3.3 V CMOS
- Test input （VSS)
I 3.3 V CMOS
- Test input （VSS)
I 3.3 V CMOS-30 kΩ PD - Test input （open or VSS)
Power supply 3.3 V
-
- Digital I/O (3.3 V) use
I 3.3 V CMOS-100 kΩ PD - DRAM test input (open or VSS)
I 3.3 V CMOS-100 kΩ PD - DRAM test input (open or VSS)
GND
-
-
- Digital use
Power supply 2.5 V
-
- DRAM (5 Mbits) use
I 3.3 V CMOS-100 kΩ PD - DRAM test input (open or VSS)
GND
-
-
- Digital use
Power supply 1.8 V
-
- Internal digital use
I 3.3 V CMOS
- 27-MHz clock for Rec 656 input (VSS when not used)
GND
-
-
- Digital use
I
3.3 V CMOS-100 kΩ PD
-
Digital video (Rec 656) input (MSB) (open or VSS when not
used)
I 3.3 V CMOS-100 kΩ PD - Digital video (Rec 656) input (open or VSS when not used)
Power supply 3.3 V
-
- Digital I/O (3.3 V) use
I 3.3 V CMOS-100 kΩ PD - Digital video (Rec 656) input (open or VSS when not used)
I 3.3 V CMOS-100 kΩ PD - Digital video (Rec 656) input (open or VSS when not used)
GND
-
-
- Digital use
Power supply 2.5 V
-
- DRAM (7 Mbits) use
GND
-
-
- Digital use
I 3.3 V CMOS-100 kΩ PD - Digital video (Rec 656) input (open or VSS when not used)
I 3.3 V CMOS-100 kΩ PD - Digital video (Rec 656) input (open or VSS when not used)
Power supply 3.3 V
-
- Digital I/O (3.3 V) use
I 3.3 V CMOS-100 kΩ PD - Digital video (Rec 656) input (open or VSS when not used)
I
GND
3.3 V CMOS-100 kΩ PD - Digital video (Rec 656) input (LSB) (open or VSS when not used)
- - - Digital use
O 3.3 V CMOS
4 mA 27-MHz clock output
Power supply 1.8 V
-
- Internal digital use
O 3.3 V CMOS
4 mA Digital video (Rec 656) output (MSB)
O 3.3 V CMOS
4 mA Digital video (Rec 656) output
GND
-
-
- Digital use
O 3.3 V CMOS
4 mA Digital video (Rec 656) output
O 3.3 V CMOS
4 mA Digital video (Rec 656) output
Power supply 3.3 V
-
- Digital I/O (3.3 V) use
O 3.3 V CMOS
4 mA Digital video (Rec 656) output
O 3.3 V CMOS
4 mA Digital video (Rec 656) output
GND
-
-
- Digital use
O 3.3 V CMOS
4 mA Digital video (Rec 656) output
O 3.3 V CMOS
4 mA Digital video (Rec 656) output (LSB)
Power supply 1.8 V
-
- Internal digital use
GND
-
-
- Digital use
I/O 3.3 V CMOS-100 kΩ PU 4 mA Test I/O (open or VDD3)
I/O 3.3 V CMOS-100 kΩ PU 4 mA Test I/O (open or VDD3)
Power supply 3.3 V
-
- Digital I/O (3.3 V) use
O 3.3 V 3-state CMOS 2 mA Phase error output
GND
-
-
- Digital use
O 3.3 V CMOS
2 mA Composite sync detection output
Clock
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
27 MHz
-
27 MHz
27 MHz
-
27 MHz
27 MHz
-
-
-
27 MHz
27 MHz
-
27 MHz
27 MHz
-
27 MHz
-
27 MHz
27 MHz
-
27 MHz
27 MHz
-
27 MHz
27 MHz
-
27 MHz
27 MHz
-
-
27 MHz
27 MHz
-
27 MHz
-
27 MHz
BST
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
YES
YES
-
YES
YES
-
-
-
YES
YES
-
YES
YES
-
-
-
YES
YES
-
YES
YES
-
YES
YES
-
YES
YES
-
-
YES
YES
-
-
-
YES
SDF00032BEM
5
5 Page 
MN673794
[b] System Clock Async/Multiple Bus Interface
Figure 3.3 (b) is the timing chart of the interface.
MAD[6:0]
MDA[15:0]
MCSALE
MNRE
MNWENBW
READ cycle (trdc)
Address
trdout
Read Data
Valid
trdw
WRITE cycle (twrc)
Address
twrs twrh
Write Data
twrw
trdc
trdout
twrc
trdw
twrw
twrs
twrh
Timing
[ns]
Min
Read cycle
148
Read data valid
–
Write cycle
148
Read pulse (MNRE) width
74
Write pulse (MNWENBW) width
74
Write data setup
twrw
Write data hold
10
Figure 3-3 (b) Microcontroller Interface Timing 2
Max
–
30
–
–
–
–
–
SDF00032BEM
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet MN673794.PDF ] | |
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