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UDA1320ATS の電気的特性と機能

UDA1320ATSのメーカーはPhilipsです、この部品の機能は「Low-cost stereo filter DAC」です。


製品の詳細 ( Datasheet PDF )

部品番号 UDA1320ATS
部品説明 Low-cost stereo filter DAC
メーカ Philips
ロゴ Philips ロゴ 




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UDA1320ATS Datasheet, UDA1320ATS PDF,ピン配置, 機能
INTEGRATED CIRCUITS
DATA SHEET
UDA1320ATS
Low-cost stereo filter DAC
Preliminary specification
Supersedes data of 1999 Oct 11
File under Integrated Circuits, IC01
2000 Jan 10

1 Page





UDA1320ATS pdf, ピン配列
Philips Semiconductors
Low-cost stereo filter DAC
Preliminary specification
UDA1320ATS
1 FEATURES
1.1 General
Low power consumption.
2.7 to 3.6 V power supply.
Selectable control via L3 microcontroller interface or via
static pin control.
256, 384 and 512fs system clock (fsys), selectable via
the L3 interface or 256 and 384fs clock mode via static
pin control
supports sampling frequencies from 16kHz to 48kHz.
Integrated digital filter plus non inverting DAC
Digital-to-Analog Converter (DAC).
Easy application and no analog post filtering required for
DAC.
Slave mode only applications.
Small package size (SSOP16).
1.2 Multiple format input interface
I2S-bus, MSB-justified and LSB-justified 16,18 and 20
bits format compatible (in L3-mode).
I2S-bus and LSB-justified 16,18 and 20 bits format
compatible in static mode.
1fs input format data rate.
1.3 DAC digital sound processing
Digital logarithmic volume control via L3.
Digital de-emphasis for 32, 44.1 and 48 kHz fs via
L3 or 44.1 kHz fs via static pin control.
Soft mute via static pin control or via L3 interface.
1.4 Advanced audio configuration
Stereo line output (under L3 volume control)
High linearity, wide dynamic range, low distortion.
2 APPLICATIONS
Portable digital audio equipment, see Fig.8.
Set-top boxes
3 GENERAL DESCRIPTION
The UDA1320ATS/N2 is a single-chip non inverting stereo
DAC employing bitstream conversion techniques. The low
power consumption and low voltage requirements make
the device eminently suitable for use in digital audio
equipment which incorporates playback functions.
The UDA1320ATS/N2 supports the I2S-bus data format
with word lengths of up to 20 bits, the MSB-justified data
format with word lengths of up to 20 bits and the
LSB-justified serial data format with word lengths of 16,
18 and 20 bits.
The UDA1320ATS/N2 can be used in two modes, either
L3-mode or static pin mode.
In the L3-mode, all digital sound processing features must
be controlled via the L3 interface, including the selection of
the system clock setting.
In the two static-modes, the UDA1320ATS/N2 can be
operated in the 256fs and 384fs system clock mode. The
mute, de-emphasis for 44.1 kHz and 4 digital input formats
(I2S and 16, 18, 20 bits LSB formats) can be selected via
static pins. The L3 interface cannot be used in this
application mode, also, volume control is not available in
this mode.
4 ORDERING INFORMATION
TYPE NUMBER
UDA1320ATS
NAME
SSOP16
PACKAGE
DESCRIPTION
plastic shrink small outline package; 16 leads; body width 4.4 mm
VERSION
SOT369-1
2000 Jan 10
3


3Pages


UDA1320ATS 電子部品, 半導体
Philips Semiconductors
Low-cost stereo filter DAC
Preliminary specification
UDA1320ATS
8.3 Multiple format input interface
L3 mode:
I2S-bus with data word length of up to 20 bits
MSB-justified format with data word length up to 20 bits
LSB-justified format with data word length of 16,
18 or 20 bits.
8.4 Static pin mode
The UDA1320ATS/N2 supports the following data input
name formats in the static pin mode (via SF0 and SF1):
I2S bus with data word length of up to 20 bits
LSB-justified format with data word length of 16,
18 or 20 bits.
See Table 2, for the static pin codes of the 4 formats,
selectable via SF0 and SF1.
The UDA1320ATS/N2 also accepts double speed data for
double speed data monitoring purposes.
Table 2 Input format selection using SF0 and SF1
FORMAT
I2S
LSB-justified 16 bits
LSB-justified 18 bits
LSB-justified 20 bits
SF0 SF1
00
01
10
11
The formats are illustrated in Fig.3. Left and right
data-channel words are time multiplexed. The WS signal
must have 50% duty-factor for all LSB-justified modes.
For BCK and WS holds that the BCK frequency must be
equal or smaller then 64 times WS, or fBCK =< 64*fWS in
both L3 and static mode.
8.5 Pin compatibility
In L3 interface mode the UDA1320ATS/N2 can be used on
boards that are designed for the UDA1322. The software
for UDA1322 can be used for the UDA1320ATS/N2 to
control de-emphasis, volume control and mute and also
the status settings like system clock setting and input data
format.
IMPORTANT: UDA1320ATS/N2 differs from the
UDA1320TZ/N1 with respect to:
in the static mode 384fs is supported instead of 512fs.
the output voltage of the DAC. In the UDA1320TZ/N1
this is 800mVrms at 3.0V, now it is 1Vrms at 3.3V power
supply
8.6 Interpolation filter (DAC)
The digital filter interpolates from 1 to 128fs by cascading
a recursive filter and a FIR filter, see Table 3.
Table 3 Interpolation filter characteristics
ITEM
Pass-band ripple
Stop band
Dynamic range
CONDITION
0 to 0.45fs
>0.55fs
0 to 0.45fs
VALUE (dB)
±0.1
50
108
8.7 Noise shaper
The 3rd-order noise shaper operates at 128fs. It shifts
in-band quantization noise to frequencies well above the
audio band. This noise shaping technique enables high
signal-to-noise ratios to be achieved. The noise shaper
output is converted into an analog signal using a
Filter-Stream DAC (FSDAC).
8.8 Filter-Stream DAC
The FSDAC is a semi-digital reconstruction filter that
converts the 1-bit data stream of the noise shaper to be
analog output voltage. The filter coefficients are
implemented as current sources and are summed at
virtual ground of the output operational amplifier. In this
way very high signal-to-noise performance and low clock
jitter sensitivity is achieved. A post-filter is not needed due
to the inherent filter function of the DAC. On-board
amplifiers convert the FSDAC output current to an output
voltage signal capable of driving a line output.
The output voltage of the FSDAC scales linearly with the
power supply voltage.
2000 Jan 10
6

6 Page



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部品番号部品説明メーカ
UDA1320ATS

Low-cost stereo filter DAC

Philips
Philips


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