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PDF UM8326 Data sheet ( Hoja de datos )

Número de pieza UM8326
Descripción Floppy Disk Data Separator
Fabricantes UMC 
Logotipo UMC Logotipo



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eUMC
UM8326/8326B
Floppy Disk Data Separator (FDDS)"""" '.I,,',,:::,,,;,,,,.,,,::,,!,,,,,:,:, "",":' "'!,
Features
• Performs complete data separation function for floppy
disk drives
• Separates FM or MF M encoded data from any magnetic
media
• Eliminates several SSI and MSI devices normally used
for data separation
• No critical adjustments required
• Compatible with standard microsysterns' FDC 1791,
FDC 1793 and other floppy disk controllers
• Small 8-pin dual-in-line package
• +5 Volt only power supply
• TTL compatible inputs and outputs
General Description
The Floppy Disk Data Separator provides a low cost
solution to the problem of converting a single stream of
pulses from a floppy disk drive into separate clock and
data inputs for a Floppy Disk Controller.
The FDDS consists primarily of a clock divider, a long-term
timing corrector, a short-term timing corrector, and re-
clocking circuitry. Sypplied in an 8-pin Dual-in-Line
package to save board real estate, the FDDS operates on
+5 volts only and is TTL compatible on all inputs and
outputs.
The UM8326 is available in two versions; the UM8326,
which is intended for 514" disks and the UM8326B for
514" and 8" disks.
Pin Configuration
Block Diagram
vDD
SEPD
CDl
CDO
REFCLK
-CDO
--CDl
CLOCK
DIVIDER
- + 5V
- GND
-DSKD
EDGE
~ DATA/CLOCK '---
PULSE
~ SEPCLK
r - - -SEPARATION
REGENERATION
U ,. -LOGIC
LOGIC
SEPD
DETECTIOI\
LOGIC
6-29

1 page




UM8326 pdf
UM8326/83268
Comparison of Data Separator (UM9228·1, UM8329, UM8326)
PINOUT'COMPARISON
Function
Power Supply:
Vee
Vss
Precompensation:
EARLY
LATE
Amount Control
Read Data:
From FDD
To FDC
Data Row
Write Data:
From FDC
To FDD
Write Enable
Write Clock
179X!765MODE
Density
MASTER CLK to FDC
Extermal Clock I/P
TEST
179X/MODE ESP
DMA
VFO
VCO SYN
UM9228-1
Pin 3 Vee
13 Vss
9 EARLY
8 LATE
------
------
------
1 RD
5 SO
7 OW
10 WD
12 WDOUT
11 WEN
17 WCLK
------
------
------
18 FCLK
19 CLKIN
------
------
16 ORO
15 BACK
14 DROO/P
2 PROR
4 PFDV
6 VCOIN
20 VCOSNC
UM8329
Pin 20 Vee
10 Ground
13 EARLY
14 LATE
17 PO
18 P1
19 P2
1 DSKD
6 SPED
5 SEPCLK
12 WDIN
7 WDOUT
------
9 CLKOUT
2 FDCSEL
3 MINI
4 DENS
8 H LT /CLK
11 XTAL/CLKIN
16 TEST
15 HLD
------
------
------
------
------
------
------
UM8326
Pin 8 VDD
4 GND
------
------
------
------
------
1 DSKD
7 SPED
2 SEPCLK
------
------
------
------
5 COO
6 COl
------
------
3 REFCLK
------
------
------
------
------
------
------
------
------
Remarks
See B
Sec C
See 0
See E
See F
TIME PRECOMPENSATION
It is a more advanced function to solve "peak Shift"
problem. UM922S-1 defines compensation time to be
250ns according to IBM PC design. UMS329's compensa-
tion time is programmable, yet UMS326 does not have this
function.
WRITE DATA
UM922S-1 and UMS329 have write data function in IC, but
, UMS326 does not; and UM922S-1 has t.he "write enable"
pin to guarantee write function unfail.
MODE SE LECT .
UMS329 and UMS326 allow user to select different FDCs
and to interface different FDCs; but UM922S-1 is especial-
ly used in 5% FDD (MFM coding) interface.
DMA MODE
UM922S-1 can accept DMA request and d.efine the delay
time between two different DMA requests to be 5 /-lS to
guarantee system can work norm~lIy.
VFO CIRCUIT
Because UM922S-1 does not have VFO and PLL circuit,
user must combine MC4024 and MC4044 to build a
complete data separator. Please see UM922S-1 application
circuit intensively.
Ordering Information
Part Number
UMS326
UMS326B
Frequency Option
4MHz
SMHz
Package Type
Plastic
Plastic
6-33

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