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UCN5833 の電気的特性と機能

UCN5833のメーカーはAllegroです、この部品の機能は「BiMOS II 32-BIT SERIAL-INPUT / LATCHED DRIVER」です。


製品の詳細 ( Datasheet PDF )

部品番号 UCN5833
部品説明 BiMOS II 32-BIT SERIAL-INPUT / LATCHED DRIVER
メーカ Allegro
ロゴ Allegro ロゴ 




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UCN5833 Datasheet, UCN5833 PDF,ピン配置, 機能
5833
UCN5833EP
OUT 2
OUT 3
7
8
OUT 4 9
OUT 5 10
OUT 6 11
OUT 7 12
OUT 8 13
OUT 9 14
OUT10 15
OUT11 16
OUT 12 17
39 OUT31
38 OUT30
37 OUT29
36 OUT28
35 OUT27
34 OUT26
33 OUT25
32 OUT24
31 OUT23
30 OUT22
29 OUT21
SUB
Dwg. No. A-13,049
ABSOLUTE MAXIMUM RATINGS
at +25°C Free-Air Temperature
Output Voltage, VOUT . . . . . . . . . . . 30 V
Logic Supply Voltage, VDD . . . . . . . 7.0 V
Input Voltage Range,
VIN . . . . . . . . . -0.3 V to VDD + 0.3 V
Continuous Output Current,
lOUT (each output) . . . . . . . . . . 125 mA
Package Power Dissipation, PD
(UCN5833A) . . . . . . . . . . . . . . . 3.5 W*
(UCN5833EP) . . . . . . . . . . . . . . 2.5 W*
Operating Temperature Range,
TA . . . . . . . . . . . . . . -20°C to +85°C
Storage Temperature Range,
TS . . . . . . . . . . . . . -55°C to +150°C
* Derate linearly to 0 W at +150°C.
Caution: CMOS devices have input static protection
but are susceptible to damage when exposed to
extremely high static electrical charges.
BiMOS II 32-BIT SERIAL-INPUT,
LATCHED DRIVER
Designed to reduce logic supply current, chip size, and system
cost, the UCN5833A/EP integrated circuits offer high-speed operation
for thermal printers. These devices can also be used to drive multi-
plexed LED displays or incandescent lamps within their 125 mA peak
output current rating. The combination of bipolar and MOS technolo-
gies gives BiMOS II smart power ICs an interface flexibility beyond the
reach of standard buffers and power driver circuits.
These 32-bit drivers have bipolar open-collector npn Darlington
outputs, a CMOS data latch for each of the drivers, a 32-bit CMOS
shift register, and CMOS control circuitry. The high-speed CMOS shift
registers and latches allow operation with most microprocessor-based
systems at data input rates above 3.3 MHz. Use of these drivers with
TTL may require input pull-up resistors to ensure an input logic high.
The UCN5833A is supplied in a 40-pin dual in-line plastic package
with 0.600" (15.24 mm) row spacing. At an ambient temperature of
+75°C, all outputs of the DlP-packaged device will sustain 50 mA
continuously. For high-density applications, the UCN5833EP is
available. This 44-lead plastic chip carrier (quad pack) is intended
for surface-mounting on solder lands with 0.050" (1.27 mm) centers.
CMOS serial data outputs permit cascading for applications requiring
additional drive lines.
FEATURES
I To 3.3 MHz Data Input Rate
I 30 V Minimum Output Breakdown
I Darlington Current-Sink Outputs
I Low-Power CMOS Logic and Latches
Always order by complete part number:
Part Number Package
UCN5833A
40-Pin DIP
UCN5833EP
44-Lead PLCC

1 Page





UCN5833 pdf, ピン配列
5833
BiMOS II 32-BIT
SERIAL-INPUT,
LATCHED DRIVER
ELECTRICAL CHARACTERISTICS at TA = +25°C, VDD = 5 V (unless otherwise noted).
Characteristic
Symbol
Test Conditions
Min.
Limits
Max.
Output Leakage Current
Collector-Emitter
Saturation Voltage
Input Voltage
Input Current
Serial Output Voltage
Supply Current
ICEX
VCE(SAT)
VIN(1)
VIN(0)
lIN(1)
lIN(0)
VOUT(1)
VOUT(0)
lDD
VOUT = 30 V, TA = 70°C
lOUT = 50 mA
lOUT = 100 mA
VIN = 5.0 V
VIN = 0 V
IOUT = -200 µA
IOUT = 200 µA
One output ON, lOUT = 100 mA
All outputs OFF
3.5
-0.3
4.5
10
1.2
1.7
5.3
+0.8
1.0
-1.0
0.3
1.0
50
Output Rise Time
tr lOUT = 100 mA, 10% to 90%
Output Fall Time
tf lOUT = 100 mA, 90% to 10%
NOTE: Positive (negative) current is defined as going into (coming out of) the specified device pin.
— 500
— 500
Units
µA
V
V
V
V
µA
µA
V
V
mA
µA
ns
ns
TRUTH TABLE
Serial
Shift Register Contents
Data Clock
Input Input I1 I2 I3 ... IN-1 IN
Serial
Latch Contents
Output
Data Strobe
Enable
Output Input I1 I2 I3 ... IN-1 IN Input
Output Contents
I1 I2 I3 ... IN-1 IN
H
H R1 R2 ... RN-2 RN-1
RN-1
L
L R1 R2 ... RN-2 RN-1
RN-1
X
R1 R2 R3 ... RN-1 RN
RN
X X X ... X X
X
L R1 R2 R3 ... RN-1 RN
P1 P2 P3 ... PN-1 PN
PN
H P1 P2 P3 ... PN-1 PN
H P1 P2 P3 ... PN-1 PN
X X X ... X X L H H H ... H H
L = Low Logic Level H = High Logic Level X = Irrelevant P = Present State R = Previous State


3Pages


UCN5833 電子部品, 半導体
5833
BiMOS II 32-BIT
SERIAL-INPUT,
LATCHED DRIVER
UCN5833EP
Dimensions in Inches
(controlling dimensions)
28
18
0.319
0.291
0.021
0.013
0.319
0.291
0.050
BSC
29
0.032
0.026
0.695
0.685
0.656
0.650
39
17
INDEX AREA
7
0.020
MIN
0.180
0.165
40 44 1 2
0.656
0.650
0.695
0.685
Dimensions in Millimeters
(for reference only)
28
6
Dwg. MA-005-44A in
18
8.10
7.39
0.533
0.331
8.10
7.39
1.27
BSC
29
0.812
0.661
17.65
17.40
16.662
16.510
39
17
INDEX AREA
7
0.51
MIN
4.57
4.20
40 44 1 2
16.662
16.510
17.65
17.40
NOTES: 1. Exact body and lead configuration at vendor’s option within limits shown.
2. Lead spacing tolerance is non-cumulative.
6
Dwg. MA-005-44A mm
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000

6 Page



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共有リンク

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部品番号部品説明メーカ
UCN5832

BiMOS II 32-BIT SERIAL-INPUT / LATCHED DRIVER

Allegro
Allegro
UCN5833

BiMOS II 32-BIT SERIAL-INPUT / LATCHED DRIVER

Allegro
Allegro


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