PDF SP5848KG Data sheet ( Hoja de datos )

Número de pieza	SP5848KG
Descripción	2.2/1.3GHz 3-Wire Bus Dual Low Phase Noise PLL
Fabricantes	Mitel Networks
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No Preview Available ! Preliminary Information SP5848 SP5848 2.2/1.3GHz 3-Wire Bus Dual Low Phase Noise PLL Preliminary Information DS5076 Issue 1.6 October 1999 Features G Dual independent PLL frequency synthesisers in a single package, optimised for double conversion cable tuners, offering improved application G 2.2GHz up-synthesiser optimised for low phase noise up to comparison frequencies of 4MHz G 1.3GHz down-synthesiser optimised for low phase noise AND small step size G Common reference oscillator and divider with independently selectable ratios for each synthesiser G 10:1 programmable charge pump current ratio in up synthesiser G 3-Wire bus programmable, each synthesiser indepently addressable G Low power consumption, typ 100mW at 5V G ESD protection, (Normal ESD handling procedures should be observed) Applications Ordering Information SP5848/KG/QP1S SP5848/KG/QP1T Description The SP5848 is a dual PLL frequency synthesizer controlled by a 3-wire bus optimised for application in double conversion tuners. Each synthesiser loop within the SP5848 is independently addressable and contains an RF programmable divider, phase/frequency detector and charge pump/loop amplifier section; a common reference frequency oscillator and divider chain is provided, whose ratios for each loop are independently programmable. Both synthesisers are optimised for low phase noise performance and in addition synthesiser 2 is capable of operation with a low comparison frequency. G TV, VCR, and cable tuning systems RF1 INPUT DATA CLOCK ENABLE RF 2 INPUT 16/17 11 BIT COUNT 4 BIT COUNT DATA INTERFACE 15 BIT LATCH 16 BIT LATCH 2 BIT LATCH 1 BIT LATCH 2 BIT LATCH 5 BIT LATCH 29 DIVIDE 16/17 4 BIT COUNT 12 BIT COUNT Figure 1 Block Diagram PUMP 1 DRIVE 1 PORT P0 PORT P1 PUMP 2 DRIVE 2 1 1 page Preliminary Information SP5848 CLOCK ENABLE DATA 222 221 220 219 218 217 216 215 21 20 P1 P0 CU1 CU0 RU2 RU1 RU0 MSB LSB ‘0’ Frequency data (15 bits) Synthesiser 1 control data CLOCK ENABLE DATA 224 223 222 220 219 218 217 216 21 20 T2 T1 T0 CD RD2 RD1 RD0 MSB LSB ‘1’ Frequency data (16 bits) Synthesiser 2 control data CU0 - CU1 RU0 - RU2 CD RD0 - RD2 T0 - T2 P0 - P1 : Synthesiser 1 charge pump : Synthesiser 1 reference division ration : Synthesiser 2 charge pump : Synthesiser 2 reference division ratio : Test modes : Switching ports P0 - P1 Figure 3 Control data 5 5 Page

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Hoja de datos destacado

Número de pieza	Descripción	Fabricantes
SP5848KG	2.2/1.3GHz 3-Wire Bus Dual Low Phase Noise PLL	Mitel Networks
SP5848KGQP1S	2.2/1.3GHz 3-Wire Bus Dual Low Phase Noise PLL	Mitel Networks

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