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PDF SP5769AKGMP1T Data sheet ( Hoja de datos )
| Número de pieza | SP5769AKGMP1T | |
| Descripción | 3GHz I2C Bus Synthesiser | |
| Fabricantes | Mitel Networks | |
| Logotipo |  |
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Features
G Complete 3·0 GHz Single Chip System
G Optimised for Low Phase Noise, with Comparison
Frequencies up to 4 MHz
G No RF Prescaler
G Selectable Reference Division Ratio
G Selectable Reference/Comparison Frequency Output
G Selectable Charge Pump Current with 10:1 Ratio
G Four Selectable I2C Addresses
G I2C Fast Mode Compliant with 3·3V and 5V Logic Levels
G Four Switching Ports
G Functional Replacement for SP5659 (except ADC)
G Pin Compatible with SP5655
G Power Consumption 110mW with VCC = 5·5V, all Ports off
G ESD Protection 2kV min., MIL-STD-883B Method 3015
Cat.1 (Normal ESD handling procedures should be
observed)
Applications
G Digital Satellite and Cable Tuning Systems
G Communications Systems
The SP5769 is a single chip frequency synthesiser
designed for tuning systems up to 3GHz. The RF
preamplifier interfaces direct with the RF programmable
divider, which is of MN1A construction so giving a step
SP5769
3GHz I2C Bus Synthesiser
Preliminary information
DS4878 Issue 4.0 October 1999
Ordering Information
SP5769A/KG/MP1S (Tubes)
SP5769A/KG/MP1T (Tape and Reel)
SP5769A/KG/QP1S (Tubes)
SP5769A/KG/QP1T (Tape and Reel)
size equal to the loop comparison frequency and no
prescaler phase noise degradation over the full RF
operating range. The comparison frequency is obtained
either from an on-chip crystal controlled oscillator, or from
an external source. The oscillator frequency, fREF, or phase
comparator frequency, fCOMP, can be switched to the REF/
COMP output providing a reference for a second frequency
synthesiser. The synthesiser is controlled via an 12C bus
Absolute Maximum Ratings
All voltages are referred to VEE = 0V
Supply voltage, VCC
RF differential input voltage
0·3V to 17V
2·5Vp-p
All I/O port DC offsets
SDA and SCL DC offset
20·3 to VCC 10·3V
20·3 to 6V
Storage temperature
255°C to 1125°C
Junction temperature
1150°C
MP16 thermal resistance
Chip to ambient, θJA
Chip to case, θJC
80°C/W
20°C/W
13
RF
INPUT 14
416/17
ADDRESS 10
SDA 4
SCL 5
I2C BUS
TRANSCEIVER
11-BIT
COUNT
4-BIT
COUNT
LOCK
fPD/2
REFERENCE
DIVIDER
ENABLE/
SELECT
PUMP
CP TEST
MODE SET
11 REF/COMP
2 CRYSTAL CAP
3 CRYSTAL
1 CHARGE PUMP
16 DRIVE
15-BIT LATCH
2 BIT
4 BIT
2 BIT
3 BIT
4-BIT LATCH AND
PORT INTERFACE
67 89
P3 P2 P1 P0
Figure 1 SP5769 block diagram
fPD/2 SELECT
1 page  
SP5769
Address
Status byte
MSB
1 1 0 0 0 MA1 MA0
POR FL
0
0
0
0
0
Table 3 Read data format (MSB transmitted first)
A
MA1, MA0
POR
FL
Acknowledge bit
Variable address bits (see Table 4)
Power On Reset indicator
Phase lock flag
LSB
1
0
A Byte 1
A Byte 2
MA1 MA0 Address input voltage level
0 0 0 to 0·1VCC
0 1 Open circuit
1 0 0·4VCC to 0·6VCC *
1 1 0·9VCC to VCC
* Programmed by connecting a 15kΩ resistor from pin 10 to VCC
Table 4 Address selection
C1 C0
00
01
10
11
Current (µA)
Min.
Typ.
Max.
6116
6247
6517
61087
6155
6330
6690
61450
6194
6412
6862
61812
Table 6 Charge pump current
T2 T1 T0
Test mode description
0 X X Normal operation
1 0 0 Charge pump sink
Status byte FL = logic ‘0’
1 0 1 Charge pump source
Status byte FL = logic ‘0’
1 1 0 Charge pump disable
Status byte FL = logic ‘1’
1 1 1 P0 = fPD/2
Table 5 Test modes
RE RS
REF/COMP output
0 X High impedance
1 0 fREF selected
1 1 fCOMP selected
Table 7 REF/COMP output
300
100 OPERATING WINDOW
40
100 200
1000
2000
FREQUENCY (MHz)
3000
Figure 3 Typical RF input sensitivity
4000
5
5 Page 
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data used is up to date and has not been superseded. Manufacturing does not necessarily include testing of all functions or parameters. These products are not suitable for use in
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Copyright 1999 MITEL Corporation
All Rights Reserved
Printed in CANADA
TECHNICAL DOCUMENTATION - NOT FOR RESALE
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| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet SP5769AKGMP1T.PDF ] | |
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