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PDF SP505 Data sheet ( Hoja de datos )
| Número de pieza | SP505 | |
| Descripción | Evaluation Board Manual | |
| Fabricantes | Sipex | |
| Logotipo |  |
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®
SP505
WAN Multi-Mode Serial Transceiver
■ +5V Only Operation
■ Seven (7) Drivers and Seven (7) Receivers
■ Driver and Receiver Tri-state Control
■ Internal Transceiver Termination Resistors for
V.11 and V.35 Protocols
■ Loopback Self-Test Mode
■ Software Selectable Protocol Selection
■ Interface Modes Supported:
✓ RS-232 (V.28)
✓ X.21/RS-422 (V.11)
✓ EIA-530 (V.10 & V.11) ✓ EIA-530A (V.10 & V.11)
✓ RS-449 (V.10 & V.11) ✓ V.35 (V.35 & V.28)
✓ V.36 (V.10 & V.11)
✓ RS-485 (un-terminated V.11)
■ Improved ESD Tolerance for Analog I/Os
■ High Differential Transmission Rates
➥ SP505A - 10Mbps
➥ SP505B - over 16Mbps
■ Compliant to NET1/2 and TBR2 Physical
Layer Requirements
(TUV Test Report NET2/052101/98)
(TUV Test Report CTR2/052101/98)
DESCRIPTION...
The SP505 is a monolithic device that supports eight (8) popular serial interface standards for DTE to
DCE connectivity. The SP505 is fabricated using a low power BiCMOS process technology, and
incorporates a Sipex patented (5,306,954) charge pump allowing +5V only operation. Seven (7) drivers
and seven (7) receivers can be configured via software for any of the above interface modes at any time.
The SP505 requires no additional external components for compliant operation for all of the eight (8)
modes of operation. All necessary termination is integrated within the SP505 and is switchable when
V.35 drivers, V.35 receivers, and V.11 receivers are used. The SP505 can operate as either a DTE or DCE.
Additional features with the SP505 include internal loopback that can be initiated in either single-ended
or differential modes. While in loopback mode, driver outputs are internally connected to receiver inputs
creating an internal signal path convenient for diagnostic testing. This eliminates the need for an external
loopback plug. The SP505 also includes a latch enable pin with the driver and receiver address decoder.
Tri-state ability for the driver and receiver outputs is controlled by supplying a 4-bit word into the address
decoder. Seven (7) drivers and one (1) receiver in the SP505 include separate enable pins for added
convenience. The SP505 is ideal for WAN serial ports in networking equipment such as routers,
switches, DSU/CSU's, and other access devices.
EIA-530
Rev: A Date: 1/27/04
WAN
V.35
SP505 Multi–Mode Serial Transceiver
1
© Copyright 2004 Sipex Corporation
1 page  
OTHER AC CHARACTERISTICS
T = +25°C and V = +5.0V unless otherwise noted.
A CC
PARAMETER
MIN.
TYP. MAX.
UNITS
DRIVER DELAY TIME BETWEEN ACTIVE MODE AND TRI-STATE MODE
RS-232/V.28
tPZL; Tri-state to Output LOW
0.70 5.0
µs
tPZH; Tri-state to Output HIGH
0.40 2.0
µs
tPLZ; Output LOW to Tri-state
0.20 2.0
µs
tPHZ; Output HIGH to Tri-state
0.40 2.0
µs
RS-423/V.10
tPZL; Tri-state to Output LOW
tPZH; Tri-state to Output HIGH
tPLZ; Output LOW to Tri-state
tPHZ; Output HIGH to Tri-state
0.15 2.0
0.20 2.0
0.20 2.0
0.15 2.0
µs
µs
µs
µs
RS-422/V.11
tPZL; Tri-state to Output LOW
tPZH; Tri-state to Output HIGH
tPLZ; Output LOW to Tri-state
tPHZ; Output HIGH to Tri-state
2.80 10.0
0.10 2.0
0.10 2.0
0.10 2.0
µs
µs
µs
µs
V.35
tPZL; Tri-state to Output LOW
tPZH; Tri-state to Output HIGH
tPLZ; Output LOW to Tri-state
tPHZ; Output HIGH to Tri-state
2.60 10.0
0.10 2.0
0.10 2.0
0.15 2.0
µs
µs
µs
µs
CONDITIONS
CL = 100pF, Fig. 34 & 40; S1
closed
CL = 100pF, Fig. 34 & 40; S2
closed
CL = 100pF, Fig. 34 & 40; S1
closed
CL = 100pF, Fig. 34 & 40; S2
closed
CL = 100pF, Fig. 34 & 40; S1
closed
CL = 100pF, Fig. 34 & 40; S2
closed
CL = 100pF, Fig. 34 & 40; S1
closed
CL = 100pF, Fig. 34 & 40; S2
closed
CL = 100pF, Fig. 34 & 37; S1
closed
CL = 100pF, Fig. 34 & 37; S2
closed
CL = 15pF, Fig. 34 & 37; S1
closed
CL = 15pF, Fig. 34 & 37; S2
closed
CL = 100pF, Fig. 34 & 37; S1
closed
CL = 100pF, Fig. 34 & 37; S2
closed
CL = 15pF, Fig. 34 & 37; S1
closed
CL = 15pF, Fig. 34 & 37; S2
closed
RECEIVER DELAY TIME BETWEEN ACTIVE MODE AND TRI-STATE MODE
RS-232/V.28
tPZL; Tri-state to Output LOW
tPZH; Tri-state to Output HIGH
tPLZ; Output LOW to Tri-state
tPHZ; Output HIGH to Tri-state
0.12 2.0 µs CL = 100pF, Fig. 35 & 38; S1
closed
0.10 2.0 µs CL = 100pF, Fig. 35 & 38; S2
closed
0.10 2.0 µs CL = 100pF, Fig. 35 & 38; S1
closed
0.10 2.0 µs CL = 100pF, Fig. 35 & 38; S2
closed
RS-423/V.10
tPZL; Tri-state to Output LOW
tPZH; Tri-state to Output HIGH
tPLZ; Output LOW to Tri-state
tPHZ; Output HIGH to Tri-state
0.10 2.0 µs CL = 100pF, Fig. 35 & 38; S1
closed
0.10 2.0 µs CL = 100pF, Fig. 35 & 38; S2
closed
0.10 2.0 µs CL = 100pF, Fig. 35 & 38; S1
closed
0.10 2.0 µs CL = 100pF, Fig. 35 & 38; S2
closed
Rev: A Date: 1/27/04
SP505 Multi–Mode Serial Transceiver
5
© Copyright 2004 Sipex Corporation
5 Page 
A
100Ω to
150Ω
Iia
B
±6V
C
V.11 RECEIVER
w/ Optional Cable Termination
(100Ω to 150Ω)
i [mA] = V [V] / 0.1
i [mA] = (V [V] – 3) / 4.0
–6V –3V
+3V +6V
i [mA] = V [V] / 0.1
i [mA] = (V [V] – 3) / 4.0
Maximum Input Current
versus Voltage
Figure 24. V.11 Receiver Input Graph w/ Termination
A
100Ω to
150Ω
B
Iib
±6V
C
A
50Ω
VT
50Ω
B
VOS
C
Figure 23. V.11 Receiver Input Current w/ Termination
Figure 25. V.35 Driver Output Test Terminated Voltage
A
VT
B
50Ω
50Ω
VOS
C
A
V2
V1
50Ω
24kHz, 550mVp-p
Sine Wave
B
C
Figure 26. V.35 Driver Output Offset Voltage
Figure 27. V.35 Driver Output Source Impedance
Rev: A Date: 1/27/04
SP505 Multi–Mode Serial Transceiver
11
© Copyright 2004 Sipex Corporation
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet SP505.PDF ] | |
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