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PDF SP1674BS Data sheet ( Hoja de datos )
| Número de pieza | SP1674BS | |
| Descripción | 12-Bit Sampling A/D Converters | |
| Fabricantes | Sipex | |
| Logotipo |  |
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® SP574B/674B/1674B/774B
12–Bit Sampling A/D Converters
s Complete Monolithic 12–Bit A/D Converters
with Sample–Hold, Reference, Clock and Tri–
state Outputs
s Full Nyquist Sampling at All Sample Rates
s Choice of Sampling Rates — 40kHz, 66kHz,
100kHz or 125kHz
s Low Power Dissipation — 110mW
s 12–Bit Linearity Over Temperature
s Commercial, Industrial and Military Tempera-
ture Ranges
s Next–GenerationReplacement for574A,674A,
1674A, 774A Devices
DESCRIPTION…
The SP574B/674B/1674B/774B (SPx74B) Series are complete 12–bit successive–approxi-
mation A/D converters integrated on a single die with tri-state output latches, an internal
reference, clock and a sample–hold. The new “B–Series” features true Nyquist sampling while
maintaining compatibility with prior versions. They are drop–in replacements for the older 574A/
674A/1674A/774A type devices.
STS DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 DGND
28 27 26 25 24 23 22 21 20 19 18 17 16 15
NIBBLE A
NIBBLE B
THREE–STATE BUFFERS AND CONTROL
NIBBLE C
12–BIT SAR
OSC
COMP
12–BIT
CAPACITANCE
DAC
CONTROL LOGIC
REF
OFFSET/GAIN
TRIM
7.5K 15K
7.5K 15K
N/C 7.5K
1 2 3 4 5 6 7 8 9 10 11 12 13 14
VLOGIC 12/8 CS
A0 R/C CE VCC REF AGND REF VEE BIP 10V 20V
OUT
IN
OFF IN
IN
SP574B/674B/1674B/774B
12–Bit Sampling A/D Converters
1
© Copyright 2000 Sipex Corporation
1 page  
PIN ASSIGNMENTS…
PIN FUNCTION
PIN FUNCTION
1 VLOGIC
28 STS
2 12/8
27 DB11(MSB)
3 CS
26 DB10
4 A0
25 DB9
5 R/C
24 DB8
6 CE
23 DB7
7 VCC
22 DB6
8 REF OUT
21 DB5
9 ANA GND(AC) 20 DB4
10 REF IN
19 DB3
11 N/C*
18 DB2
12 BIP OFF
17 DB1
13 10VIN
16 DB0(LSB)
14 20VIN
15 DIG. GND
*This pin is not connected inside the device so it can
be tied to –15V, ground, or left floating.
FEATURES…
The SPx74B Series feature standard bipolar
and unipolar input ranges of 10V and 20V. Input
ranges are controlled by a bipolar offset pin and
laser-trimmed for specified linearity, gain and
offset accuracy. Power requirements are +5V
and +12V to +15V with a maximum dissipation
of 150mW at the specified voltages. Conversion
times of 8µs, 10µs, 15µs and 25µs are available,
as are units with 10, 25 or 50ppm/°C tempera-
ture coefficients for flexible matching to spe-
cific application requirements.
The SPx74B Series are available in nine prod-
uct grades for each conversion time. The –J
and –K models are specified over 0˚C to +
70˚C commercial temperature range; the –A
and –B models are specified over the –40˚C
to +85˚C industrial temperature range; the –S
and –T models are specified over the –55˚C to
+125˚C military temperature range. Package
options include 28–pin CDIP, 28–pin plastic
DIP (both narrow and wide), 28-pin PLCC
and 28–pin SOIC.
CIRCUIT OPERATION…
The SPx74B are complete monolithic capacitor
DAC–based 12–bit analog-to-digital convert-
ers with integral voltage reference, comparator,
successive–approximation register (SAR),
sample–and–hold, clock, output buffers and
control circuitry. The high level of integration
of the SPx74B Series means they require few
external components.
When the control section of the SPx74B initiates
a conversion command, the clock is enabled and
the successive–approximation register is reset to
all zeros. Once the conversion cycle begins, it can
not be stopped or restarted and data is not available
from the output buffers. The SAR, timed by the
clock, sequences through the conversion cycle and
returns an end–of–convert flag to the control sec-
tion of the ADC. The clock is then disabled by the
control section, the output status goes low, and the
control section is enabled to allow the data to be
read by external command.
The internal SPx74B 12–bit CDAC is sequenced
by the SAR starting from the MSB to the LSB at
the beginning of the conversion cycle to provide
an output voltage from the CDAC that is equal
to the input signal voltage (which is divided by
the input voltage divider network). The com-
parator determines whether the addition of each
successively–weighted bit voltage causes the
CDAC output voltage summation to be greater
or less than the input voltage; if the sum is less,
the bit is left on; if more, the bit is turned off.
After testing all the bits, the SAR contains a 12–
bit binary code which accurately represents the
input signal to within ±1⁄2 LSB.
The internal reference provides the voltage refer-
ence to the CDAC with excellent stability over
temperature and time. The reference is trimmed
to 10.00 Volts ±1% and can supply up to 2mA to
an external load in addition to that required to
drive the reference input resistor (1mA) and
offset resistor (1mA) when operating with ±15V
supplies. If the SPx74B is used with ±12V
supplies, or if external current must be supplied
over the full temperature range, an external
buffer amplifier is recommended. Any external
load on the SPx74B reference must remain
constant during conversion.
SP574B/674B/1674B/774B
12–Bit Sampling A/D Converters
5
© Copyright 2000 Sipex Corporation
5 Page 
CONVERT MODE TIMING
CE
tSSC
CS
R/C tSRC
A0
tSAC
STS
DB11–
DB0
tHEC
tHRC
tHAC
tDSC
tC
HIGH IMPEDANCE
CHARACTERISTICS
Typical @ 25˚C, VCC = +15V or +10V, VLOGIC = +5V, VEE = 0V, unless otherwise specified.
PARAMETER
tDSC STS Delay from CE
tHEC CE Pulse Width
tSSC CS to CE Setup
tHSC CS Low during CE High
tSRC R/C to CE Setup
tHRC R/C Low during CE High
tSAC A0 to CE Setup
tHAC A0 Valid during CE High
tC Conversion Time1, 3, 4
MIN. TYP. MAX.
200
50
50
50
50
50
0
50
See specifications
NOTES:
1. Parameters guaranteed by design and sample tested.
2. Parameters 100% tested @ 25˚C on special orders.
3. 100% tested.
4. TMIN to TMAX.
Figure 6. Convert Mode Timing
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
CONDITIONS
SP574B/674B/1674B/774B
12–Bit Sampling A/D Converters
11
© Copyright 2000 Sipex Corporation
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet SP1674BS.PDF ] | |
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