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PDF 74FR25900 Data sheet ( Hoja de datos )
| Número de pieza | 74FR25900 | |
| Descripción | 9-Bit / 3-Port Latchable Datapath Multiplexer with 25W Output Series Resistors | |
| Fabricantes | Fairchild | |
| Logotipo |  |
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July 1992
Revised August 1999
74FR25900
9-Bit, 3-Port Latchable Datapath Multiplexer
with 25Ω Output Series Resistors
General Description
The 74FR25900 is a data bus multiplexer routing any of
three 9-bit ports to any other one of the three ports. Read-
back of data latched from any port onto itself is also possi-
ble. The 74FR25900 maintains separate control of all latch-
enable, output enable and select inputs for maximum flexi-
bility. PINV allows inversion of the data from the C8 to A8 or
B8 path. This is useful for control of the parity bit in systems
diagnostics.
This device includes 25Ω resistors in series with A and B
Port outputs. Resistors minimize undershoot and ringing
which may damage or corrupt sensitive device inputs
driven by these ports.
Features
s 25Ω series resistors in the port A and B outputs elimi-
nate the need for external resistors when driving MOS
inputs such as DRAM arrays
s 9-bit data ports for systems carrying parity bits
s Readback capability for system self checks.
s Independent control lines for maximum flexibility
s Guaranteed multiple output switching and 250 pF load
delays
s Outputs optimized for dynamic bus drive capability
s PINV parity control facilitates system diagnostics
s 74FR900 option available without output series resistors
Ordering Code:
Order Number Package Number
Package Description
74FR25900SSC
MS48A
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
Pin Description
Pin Names
LExx
OEx
PINV
S0, S1
A0–A8
B0–B8
C0–C8
Description
Latch Enable Inputs
Output Enable Inputs
Parity Invert Input
Select Inputs
Port A Inputs or 3-STATE Outputs
Port B Inputs or 3-STATE Outputs
Port C Inputs or 3-STATE Outputs
© 1999 Fairchild Semiconductor Corporation DS011500
www.fairchildsemi.com
1 page  
AC Electrical Characteristics
Symbol
Parameter
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tPZH
tPZL
tPHZ
tPLZ
Propagation Delay
An or Bn to Cn
Cn to An or Bn
Propagation Delay
C8 to A8 or B8 (PINV HIGH)
Propagation Delay
An to Bn, Bn to An
Propagation Delay
LEAC to Cn, LEBC to Cn
Propagation Delay
LECA to An, LECB to Bn
Propagation Delay
S0 to Cn
Propagation Delay
S1 to An or Bn
Propagation Delay
PINV to A8 or B8
Output Enable Time
Cn
Output Disable Time
Cn
Output Enable Time
An, Bn
Output Disable Time
An, Bn
AC Operating Requirements
Symbol
Parameter
tS(H)
tS(L)
tH(H)
tH(L)
tS(H)
tS(L)
tH(H)
tH(L)
tW(H)
Setup Time, HIGH or LOW
An to LEAC, Bn to LEBC
Hold Time, HIGH or LOW
An to LEAC, Bn to LEBC
Setup Time, HIGH or LOW
Cn to LECA or LECB
Hold Time, HIGH or LOW
Cn to LECA or LECB
LE Pulse Width LOW
TA = +25°C
VCC = +5.0V
CL = 50 pF
Min Typ Max
2.0 4.7 7.5
2.5 4.8 7.5
4.5 7.0 11.5
4.5 6.8 10.0
3.5 6.0 10.0
3.0 6.0 10.0
4.0 7.0 11.5
2.5 5.5 9.5
1.5 4.0 6.5
1.5 4.0 6.0
1.5 6.0 8.0
1.5 5.0 7.0
TA = 0°C to +70°C
VCC = +5.0V
CL = 50 pF
Min Max
2.0 7.5
Units
ns
2.5 7.5
4.5 11.5
4.5 10.0
3.5 10.0
3.0 10.0
4.0 11.5
2.5 9.5
1.5 6.5
1.5 6.0
1.5 8.0
1.5 7.0
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
TA = +25°C
VCC = +5.0V
CL = 50 pF
Min Typ Max
4.5 2.5
1.0 −1.5
3.0 1.0
1.0 −1.0
8.0 4.0
TA = 0°C to +70°C
VCC = +5.0V
CL = 50 pF
Min Max
4.5
1.0
3.0
1.0
8.0
Units
ns
ns
ns
ns
ns
5 www.fairchildsemi.com
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| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet 74FR25900.PDF ] | |
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