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PDF MT9172 Data sheet ( Hoja de datos )
| Número de pieza | MT9172 | |
| Descripción | ISO2-CMOS ST-BUS FAMILY Digital Subscriber Interface Circuit Digital Network Interface Circuit | |
| Fabricantes | Mitel Networks | |
| Logotipo |  |
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ISO2-CMOS ST-BUS™ FAMILY MT9171/72
®
Digital Subscriber Interface Circuit
Digital Network Interface Circuit
Features
• Full duplex transmission over a single twisted
pair
• Selectable 80 or 160 kbit/s line rate
• Adaptive echo cancellation
• Up to 3km (9171) and 4 km (9172)
• ISDN compatible (2B+D) data format
• Transparent modem capability
• Frame synchronization and clock extraction
• MITEL ST-BUS compatible
• Low power (typically 50 mW), single 5V supply
Applications
• Digital subscriber lines
• High speed data transmission over twisted
wires
• Digital PABX line cards and telephone sets
• 80 or 160 kbit/s single chip modem
Description
The MT9171 (DSIC) and MT9172 (DNIC) are multi-
function devices capable of providing high speed,
full duplex digital transmission up to 160 kbit/s over
ISSUE 1
May 1995
Ordering Information
MT9171AE 22 Pin Plastic DIP
MT9172AE 22 Pin Plastic DIP
MT9172AC 22 Pin Ceramic DIP
MT9171AN 24 Pin SSOP
MT9172AN 24 Pin SSOP
MT9171AP 28 Pin PLCC
MT9172AP 28 Pin PLCC
-40°C to +85°C
a twisted wire pair. They use adaptive echo-
cancelling techniques and transfer data in (2B+D)
format compatible to the ISDN basic rate. Several
modes of operation allow an easy interface to digital
telecommunication networks including use as a high
speed limited distance modem with data rates up to
160 kbit/s. Both devices function identically but with
the DSIC having a shorter maximum loop reach
specification. The generic "DNIC" will be used to
reference both devices unless otherwise noted.
The MT9171/72 is fabricated in Mitel’s ISO2-CMOS
process.
DSTi/Di
CDSTi/
CDi
F0/CLD
C4/TCK
F0o/RCK
MS0
MS1
MS2
RegC
DSTo/Do
CDSTo/
CDo
Transmit
Interface
Prescrambler
Scrambler
Differentially
Encoded Biphase
Transmitter
Transmit
Filter &
Line Driver
Control
Register
Transmit
Timing
Master Clock
Phase Locked
Transmit/
Clock
Receive
Timing &
Control Sync Detect
DPLL
Status
Receive
Address
Echo Canceller
Error
Signal Echo Estimate
—
+
∑
Receive
Filter
VBias
MUX
-1
+2
Receive
Interface
De-
Prescrambler
Descrambler
Differentially
Encoded Biphase
Receiver
VDD VSS VBias VRef
Figure 1 - Functional Block Diagram
LOUT
LOUT
DIS
Precan
LIN
OSC2
OSC1
9-133
1 page  
Advance Information
MT9171/72
Functional Description
The MT9171/72 is a device which has been
designed primarily as an interface for the Integrated
Services Digital Network (ISDN). However, it may be
used in practically any application that requires high
speed data transmission over two wires, including
smart telephone sets, workstations, data terminals
and computers.
In the ISDN, the DNIC is ideal for providing the
interface at the U reference point. The device
supports the 2B+D channel format (two 64 kbit/s B-
channels and one 16 kbit/s D-channel) over two
wires as recommended by the CCITT. The line data
is converted to and from the ST-BUS format on the
system side of the network to allow for easy
interfacing with other components such as the S-
interface device in an NT1 arrangement, or to digital
PABX components.
Smart telephone sets with data and voice capability
can be easily implemented using the MT9171/72 as
a line interface. The device’s high bandwidth and
long loop length capability allows its use in a wide
variety of sets. This can be extended to provide full
data and voice capability to the private subscriber by
the installation of equipment in both the home and
central office or remote concentration equipment.
Within the subscriber equipment the MT9171/72
would terminate the line and encode/ decode the
data and voice for transmission while additional
electronics could provide interfaces for a standard
telephone set and any number of data ports
supporting standard data rates for such things as
computer communications and telemetry for remote
meter reading. Digital workstations with a high
degree of networking capability can be designed
using the DNIC for the line interface, offering up to
160 kbit/s data transmission over existing telephone
lines. The MT9171/72 could also be valuable within
existing computer networks for connecting a large
number of terminals to a computer or for
intercomputer links. The highest data rates existing
for terminal to computer links is 19.2 kbit/s over
conventional analog modems. With the DNIC, this
can be increased up to 160 kbit/s at a very low cost
per line for terminal to computer links and in many
cases this bandwidth would be sufficient for
computer to computer links.
Figure 1 shows the block diagram of the MT9171/72.
The DNIC provides a bidirectional interface between
the DV (data/voice) port and a full duplex line
operating at 80 or 160 kbit/s over a single pair of
twisted wires. The DNIC has three serial ports. The
DV port (DSTi/Di, DSTo/Do), the CD (control/data)
port (CDSTi/CDi, CDSTo/CDo) and a line port (LIN,
LOUT). The data on the line is made up of information
from the DV and CD ports. The DNIC must combine
information received from both the DV and CD ports
and put it onto the line. At the same time, the data
received from the line must be split into the various
channels and directed to the proper ports. The
usable data rates are 72 and 144 kbit/s as required
for the basic rate interface in ISDN. Full duplex
transmission is made possible through on board
adaptive echo cancellation.
The DNIC has various modes of operation which are
selected through the mode select pins MS0-2. The
two major modes of operation are the MODEM
(MOD) and DIGITAL NETWORK (DN) modes. MOD
mode is a transparent 80 or 160 kbit/s modem. In
DN mode the line carries the B and D channels
formatted for the ISDN at either 80 or 160 kbit/s. In
the DN mode the DV and CD ports are standard ST-
BUS and in MOD mode they are transparent serial
data streams at 80 or 160 kbit/s. Other modes
include: MASTER (MAS) or SLAVE (SLV) mode,
where the timebase and frame synchronization are
provided externally or are extracted from the line and
DUAL or SINGLE (SINGL) port modes, where both
the DV and CD ports are active or where the CD port
is inactive and all information is passed through the
DV port. For a detailed description of the modes see
“Operating Modes” section.
In DIGITAL NETWORK (DN) mode there are three
channels transferred by the DV and CD ports. They
are the B, C and D channels. The B1 and B2
channels each have a bandwidth of 64 kbit/s and are
used for carrying PCM encoded voice or data. These
channels are always transmitted and received
through the DV port (Figures 3, 4, 5, 6). The C-
channel, having a bandwidth of 64 kbit/s, provides a
means for the system to control the DNIC and for the
DNIC to pass status information back to the system.
The C-channel has a Housekeeping (HK) bit which is
the only bit of the C-channel transmitted and
received on the line. The 2B+D channel bits and the
HK bit are double-buffered. The D-channel can be
transmitted or received on the line with either an 8,
16 or 64 kbit/s bandwidth depending on the DNIC’s
mode of operation. Both the HK bit and the D-
channel can be used for end-to-end signalling or low
speed data transfer. In DUAL port mode the C and D
channels are accessed via the CD port (Figure 7)
while in SINGL port mode they are transferred
through the DV port (Figures 5, 6) along with the B1
and B2 channels.
9-137
5 Page 
Advance Information
MT9171/72
information over the line at 8, 16 or 64 kbit/s (by
using the DINB feature). The information passes
transparently through the DNIC and is transmitted to
or received from the line at the bit rate selected in
the Control Register.
If the bit rate is 80 kbit/s, only D0 is transmitted and
received. At 160 kbit/s, D0 and D1 are transmitted
and received. When the DINB bit is set in the Control
Register the entire D-channel is transmitted and
received in the B1-channel timeslot.
The C-channel is used for transferring control and
status information between the DNIC and the
system. The Control and Diagnostics Registers are
accessed through the C-channel. They contain
information to control the DNIC and carry out the
diagnostics as well as the HK bit to be transmitted on
the line as described in Tables 4 and 5. Bits 0 and 1
of the C-channel select between the Control and
Diagnostics Register. If these bits are 0, 0 then the
C-channel information is written to the Control
Register (Table 4). If they are 0, 1 the C-channel is
written to the Diagnostics Register (Table 5).
The Diagnostics Register Reset bit (bit 2) of the
Control Register determines the reset state of the
Diagnostics Register. If, on writing to the Control
Register, this bit is set to logic “0”, the Diagnostics
Register will be reset coincident with the frame
pulse. When this bit is logic “1”, the Diagnostics
Register will not be reset. In order to use the
diagnostic features, the Diagnostics Register must
be continuously written to. The output C-channel
sends status information from the Status Register to
the system along with the received HK bit as shown
in Table 6.
In MOD mode, the CD port is no longer an ST-BUS
but is a serial bit stream operating at the bit rate
bit 0
bit 1
Reg Sel-1 Reg Sel-2
bit 2
DRR
bit 3
BRS
bit 4
bit 5
bit 6
bit 7
DINB
PSEN
ATTACK
TxHK
Default Mode Selection (Refer to Table 4a)
Bit Name
Description
0 Reg Sel-1 Register Select-1. Must be set to ’0’ to select the Control Register.
1 Reg Sel-2 Register Select-2. Must be set to ’0’ to select the Control Register.
2
DRR
Diagnostics Register Reset. Writing a "0" to this bit will cause a diagnostics register reset
to occur coincident with the next frame pulse as in the MT8972A. When this bit is a logic
"1", the Diagnostics Register will not be reset.
3
BRS
Bit Rate Select. When set to ’0’ selects 80 kbit/s. When set to ’1’, selects 160 kbit/s.
4 DINB D-Channel in B Timeslot. When ’0’, the D-channel bits (D0 or D0 and D1) corresponding
to the selected bit rate (80 or 160 kbit/s) are transmitted during the normal D-channel bit
times. When set to ’1’, the entire D-channel (D0-D7) is transmitted during the B1-channel
timeslot on the line providing a 64 kbit/s D-channel link.
5 PSEN Prescrambler/Deprescrambler Enable. When set to ’1’, the data prescrambler and
deprescrambler are enabled. When set to ’0’, the data prescrambler and deprescrambler
are disabled.
6 ATTACK Convergence Speedup. When set to ’1’, the echo canceller will converge to the reflection
coefficient much faster. Used on power-up for fast convergence. When ’0’, the echo
canceller will require the normal amount of time to converge to a reflection coefficient.
7 TxHK Transmit Housekeeping. When set to ’0’, logic zero is transmitted over the line as
Housekeeping Bit. When set to ’1’, logic one is transmitted over the line as
Housekeeping Bit.
Table 4. Control Register
Notes:
Suggested use of ATTACK:
-At 160 kbit/s full convergence requires 850 ms with ATTACK held high for the first 240 frames or 30 ms.
-At 80 kbit/s full convergence requires 1.75 s with ATTACK held high for the first 480 frames or 60 ms.
When bits 4-7 of the Control Register are all set to one, the DNIC operates in one of the default modes as defined in Table 4a,
depending upon the status of bit-3.
9-143
11 Page | ||
| Páginas | Total 22 Páginas | |
| PDF Descargar | [ Datasheet MT9172.PDF ] | |
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