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87C055のメーカーはNXP Semiconductorsです、この部品の機能は「Microcontrollers for TV and video MTV」です。 |
部品番号 | 87C055 |
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部品説明 | Microcontrollers for TV and video MTV | ||
メーカ | NXP Semiconductors | ||
ロゴ | |||
このページの下部にプレビューと87C055ダウンロード(pdfファイル)リンクがあります。 Total 30 pages
INTEGRATED CIRCUITS
DATA SHEET
83C145; 83C845
83C055; 87C055
Microcontrollers for TV and video
(MTV)
Product specification
File under Integrated Circuits, IC20
1996 Mar 22
1 Page Philips Semiconductors
Microcontrollers for TV and video (MTV)
Product specification
83C145; 83C845
83C055; 87C055
1 FEATURES
• Masked ROM sizes:
– 8 kbytes (83C845)
– 12 kbytes (83C145)
– 16 kbytes (83C055)
– 16 kbytes OTP (87C055)
• RAM: 256 bytes
• On Screen Display (OSD) controller
• Three digital video outputs
• Multiplexer/mixer and background intensity controls
• Flexible formatting with OSD New Line option
• 128 × 10 bits display RAM
• Designed for reduced Radio Frequency Interference
(RFI)
• Character generator ROM:
– character format 18 lines × 14 dots
– 60 visible characters
– 4 special characters
• Eight text shadowing modes
• Text colour selectable per character
• Background colour selectable per word
• Background colour versus video selectable per
character
• Eight 6-bit Pulse Width Modulators (PWM) for analog
voltage integration
• One 14-bit PWM for high-precision voltage integration
• Digital-to-analog converter and comparator with 3 inputs
multiplexer
• Nine dedicated I/Os plus 28 port bits (15 port bits with
alternative uses)
• 4 high current open-drain port outputs
• 12 high voltage (+12 V) open-drain outputs
• Programmable video input and output polarities
• 80C51 instruction set
• No external memory capability
• Plastic shrink dual in-line package (0.07 inch centre
pins)
• High-speed CMOS technology
• Power supply: 5 V ±10%.
2 DESCRIPTION
The 83C055, Microcontroller for Television and Video
(MTV) applications, is a derivative of Philips’ industry
standard 80C51 microcontroller.
The 83C055 is intended for use as the central control
mechanism in a television receiver or tuner.
3 APPLICATIONS
Providing tuner functions and an OSD facility, it represents
a next generation replacement for the currently available
parts.
4 ORDERING INFORMATION
TYPE NUMBER
NAME
PACKAGE
DESCRIPTION
VERSION
P83C055BBP
P87C055BBP
P83C145BBP
P83C845BBP
SDIP42 plastic shrink dual in-line package; 42 leads (600 mil) SOT270-1
TEMP.
RANGE
(°C)
0 to +70
FREQ.
(MHz)
3.5 to 12
1996 Mar 22
3
3Pages Philips Semiconductors
Microcontrollers for TV and video (MTV)
Product specification
83C145; 83C845
83C055; 87C055
6.2 Pin description
Table 2 Pin description SDIP42 (SOT270-1)
SYMBOL
PIN
DESCRIPTION
Port 0 (notes 1, 2 and 4)
P0.0/TDAC/VPP
1
P0.1/PWM1/PROG 2
P0.2/PWM2/ASEL
3
P0.3/PWM3
to
P0.7/PWM7
4 to 8
P0.0: open-drain bidirectional port line;
TDAC: output for the 14-bit high-precision PWM;
VPP: 12 V programming supply voltage during EPROM programming.
P0.1: open-drain bidirectional port line;
PWM1: output for the 6-bit lower-precision PWM;
PROG: input for EPROM programming pulses.
P0.2: open-drain bidirectional port line;
PWM2: output for the 6-bit lower-precision PWM;
ASEL: input indicating the EPROM address bits that are applied to Port 2.
P0.3 to P0.7: 5 open-drain bidirectional port lines;
PWM3 to PWM7: 5 outputs for the 6-bit lower-precision PWM.
Port 1 (notes 1, 2 and 5)
P1.0/ADI0
to
P1.2/ADI2
P1.3/PWM0
9 to 11 P1.0 to P1.2: 3 open-drain bidirectional port lines;
ADI0 to ADI2: inputs for the software analog-to-digital facility.
12 P1.3: open-drain bidirectional port line; PWM0: output for the 6-bit lower-precision
PWM. PWM0 can be externally pulled up as high as +12 V ±5%
Port 2
P2.7 to P2.0
13 to 20 Port 2: 8-bit open-drain bidirectional port; P2.3 to P2.0 have high current capability
(10 mA at 0.5 V) for driving LEDs. Port 2 pins that have logic 1s written to them float,
and in that state can be used as high-impedance inputs. Any of the Port 2 pins are
driven LOW if the port register bit is written as a logic 0. The state of the pin can
always be read from the port register by the program.
Port 3 (note 1 and 3)
P3.0
34 P3.0: open-drain bidirectional port line.
P3.1/INT1
35 P3.1: open-drain bidirectional port line; INT1: External interrupt 1.
P3.2/T0
36 P3.2: open-drain bidirectional port line; T0: Timer 0 external input.
P3.3/INT0
37 P3.3: open-drain bidirectional port line; INT0: External interrupt 0.
P3.4 to P3.7
38 to 41 P3.4 to P3.7: 4 open-drain bidirectional port lines.
General
VSS
VID2 to VID0
VCTRL
21 Ground: 0 V reference.
22 to 24 Digital Video bus: Three totem-pole outputs comprising digital RGB (or other colour
encoding) from the OSD facility. The polarity of these outputs is controlled by a
programmable register bit (register OSCON; bit Po).
25 Video Control: A totem-pole output indicating whether the OSD facility is currently
presenting active video on the VID2 to VID0 outputs. Signal is used to control an
external multiplexer (mixer) between normal video and the video derived from VID2 to
VID0. The polarity of this output is controlled by a programmable register bit (register
OSCON; bit Pc).
1996 Mar 22
6
6 Page | |||
ページ | 合計 : 30 ページ | ||
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部品番号 | 部品説明 | メーカ |
87C055 | Microcontrollers for TV and video MTV | NXP Semiconductors |