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MMBT2369LT1 の電気的特性と機能

MMBT2369LT1のメーカーはMotorola Semiconductorsです、この部品の機能は「Switching Transistors」です。


製品の詳細 ( Datasheet PDF )

部品番号 MMBT2369LT1
部品説明 Switching Transistors
メーカ Motorola Semiconductors
ロゴ Motorola Semiconductors ロゴ 




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MMBT2369LT1 Datasheet, MMBT2369LT1 PDF,ピン配置, 機能
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document
by MMBT2369LT1/D
Switching Transistors
NPN Silicon
COLLECTOR
3
1
BASE
MMBT2369LT1
MMBT2369ALT1*
*Motorola Preferred Device
MAXIMUM RATINGS
Rating
Symbol
Value
Collector – Emitter Voltage
Collector – Emitter Voltage
Collector – Base Voltage
Emitter – Base Voltage
Collector Current — Continuous
THERMAL CHARACTERISTICS
VCEO
VCES
VCBO
VEBO
IC
15
40
40
4.5
200
Characteristic
Total Device Dissipation FR– 5 Board(1)
TA = 25°C
Derate above 25°C
Symbol
PD
Max
225
1.8
Thermal Resistance, Junction to Ambient
Total Device Dissipation
Alumina Substrate,(2) TA = 25°C
Derate above 25°C
RqJA
PD
556
300
2.4
Thermal Resistance, Junction to Ambient
Junction and Storage Temperature
DEVICE MARKING
RqJA
TJ, Tstg
417
– 55 to +150
MMBT2369LT1 = M1J; MMBT2369ALT1 = 1JA
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristic
OFF CHARACTERISTICS
Collector – Emitter Breakdown Voltage (3)
(IC = 10 mAdc, IB = 0)
Collector – Emitter Breakdown Voltage
(IC = 10 µAdc, VBE = 0)
Collector – Base Breakdown Voltage
(IC = 10 mAdc, IE = 0)
Emitter – Base Breakdown Voltage
(IE = 10 mAdc, IC = 0)
Collector Cutoff Current
(VCB = 20 Vdc, IE = 0)
(VCB = 20 Vdc, IE = 0, TA = 150°C)
Collector Cutoff Current
(VCE = 20 Vdc, VBE = 0)
 1. FR– 5 = 1.0 0.75 0.062 in.
 2. Alumina = 0.4 0.3 0.024 in. 99.5% alumina.
3. Pulse Test: Pulse Width 300 µs, Duty Cycle 2.0%.
MMBT2369A
2
EMITTER
Unit
Vdc
Vdc
Vdc
Vdc
mAdc
Unit
mW
mW/°C
°C/W
mW
mW/°C
°C/W
°C
Symbol
V(BR)CEO
V(BR)CES
V(BR)CBO
V(BR)EBO
ICBO
ICES
Thermal Clad is a trademark of the Bergquist Company.
Preferred devices are Motorola recommended choices for future use and best overall value.
Min
15
40
40
4.5
3
1
2
CASE 318 – 08, STYLE 6
SOT– 23 (TO – 236AB)
Typ Max Unit
Vdc
——
Vdc
——
Vdc
——
Vdc
——
µAdc
— 0.4
— 30
µAdc
— 0.4
©MMotootorroollaa,
Small–Signal
Inc. 1996
Transistors,
FETs
and
Diodes
Device
Data
1

1 Page





MMBT2369LT1 pdf, ピン配列
MMBT2369LT1 MMBT2369ALT1
SWITCHING TIME EQUIVALENT TEST CIRCUITS FOR 2N2369, 2N3227
+10.6 V
0
–1.5 V
t1
< 1 ns
PULSE WIDTH (t1) = 300 ns
DUTY CYCLE = 2%
270
3V
3.3 k
Figure 1. ton Circuit — 10 mA
Cs* < 4 pF
+10.75 V
t1
0
–9.15 V
< 1 ns
PULSE WIDTH (t1) = 300 ns
DUTY CYCLE = 2%
270
3.3 k
Cs* < 4 pF
Figure 3. toff Circuit — 10 mA
+10.8 V
t1
95
10 V
0
–2 V
< 1 ns
PULSE WIDTH (t1) = 300 ns
DUTY CYCLE = 2%
1k
Cs* < 12 pF
+11.4 V
t1
95
10 V
0
–8.6 V
< 1 ns
PULSE WIDTH (t1) BETWEEN
10 AND 500 µs
DUTY CYCLE = 2%
1k
1N916
Cs* < 12 pF
Figure 2. ton Circuit — 100 mA
Figure 4. toff Circuit — 100 mA
* Total shunt capacitance of test jig and connectors.
TURN–ON WAVEFORMS
Vin
0 10%
Vout 90%
ton
PULSE GENERATOR
Vin RISE TIME < 1 ns
SOURCE IMPEDANCE = 50
PW 300 ns
DUTY CYCLE < 2%
TO OSCILLOSCOPE
INPUT IMPEDANCE = 50
220
0.1 µF
RISE TIME = 1 ns
Vout TURN–OFF WAVEFORMS
3.3 k
Vin
3.3 k 50
0
Vin
10%
0.0023 µF 0.0023 µF
50 0.005 µF 0.005 µF
Vout 90%
VBB
+
0.1 µF
0.1 µF
+
VCC
=
3
V
VBB = +12 V
toff Vin = –15 V
Figure 5. Turn–On and Turn–Off Time Test Circuit
6
5
TJ = 25°C
LIMIT
TYPICAL
4
Cib
3 Cob
2
1
0.1 0.2
0.5 1.0 2.0
REVERSE BIAS (VOLTS)
5.0 10
Figure 6. Junction Capacitance Variations
100
50
20
10
5
2
1
tr (VCC = 3 V)
βF = 10
VCC = 10 V
VOB = 2 V
tf
tr VCC = 10 V
ts
td
2 5 10 20
IC, COLLECTOR CURRENT (mA)
50
Figure 7. Typical Switching Times
100
Motorola Small–Signal Transistors, FETs and Diodes Device Data
3


3Pages


MMBT2369LT1 電子部品, 半導体
MMBT2369LT1 MMBT2369ALT1
INFORMATION FOR USING THE SOT–23 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor packages must
be the correct size to insure proper solder connection
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
0.037
0.95
0.037
0.95
0.035
0.9
0.079
2.0
0.031
0.8
inches
mm
SOT–23
SOT–23 POWER DISSIPATION
The power dissipation of the SOT–23 is a function of the
pad size. This can vary from the minimum pad size for
soldering to a pad size given for maximum power dissipation.
Power dissipation for a surface mount device is determined
by TJ(max), the maximum rated junction temperature of the
die, RθJA, the thermal resistance from the device junction to
ambient, and the operating temperature, TA. Using the
values provided on the data sheet for the SOT–23 package,
PD can be calculated as follows:
PD =
TJ(max) – TA
RθJA
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values into
the equation for an ambient temperature TA of 25°C, one can
calculate the power dissipation of the device which in this
case is 225 milliwatts.
PD =
150°C – 25°C
556°C/W
= 225 milliwatts
The 556°C/W for the SOT–23 package assumes the use
of the recommended footprint on a glass epoxy printed circuit
board to achieve a power dissipation of 225 milliwatts. There
are other alternatives to achieving higher power dissipation
from the SOT–23 package. Another alternative would be to
use a ceramic substrate or an aluminum core board such as
Thermal Clad. Using a board material such as Thermal
Clad, an aluminum core board, the power dissipation can be
doubled using the same footprint.
SOLDERING PRECAUTIONS
The melting temperature of solder is higher than the rated
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within a
short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.
Always preheat the device.
The delta temperature between the preheat and
soldering should be 100°C or less.*
When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering method,
the difference shall be a maximum of 10°C.
The soldering temperature and time shall not exceed
260°C for more than 10 seconds.
When shifting from preheating to soldering, the
maximum temperature gradient shall be 5°C or less.
After soldering has been completed, the device should
be allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and result
in latent failure due to mechanical stress.
Mechanical stress or shock should not be applied during
cooling.
* Soldering a device without preheating can cause excessive
thermal shock and stress which can result in damage to the
device.
6 Motorola Small–Signal Transistors, FETs and Diodes Device Data

6 Page



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共有リンク

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