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MMBT2222ALT1 の電気的特性と機能

MMBT2222ALT1のメーカーはMotorola Semiconductorsです、この部品の機能は「General Purpose Transistors」です。


製品の詳細 ( Datasheet PDF )

部品番号 MMBT2222ALT1
部品説明 General Purpose Transistors
メーカ Motorola Semiconductors
ロゴ Motorola Semiconductors ロゴ 




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MMBT2222ALT1 Datasheet, MMBT2222ALT1 PDF,ピン配置, 機能
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document
by MMBT2222LT1/D
General Purpose Transistors
NPN Silicon
COLLECTOR
3
1
BASE
MMBT2222LT1
MMBT2222ALT1*
*Motorola Preferred Device
MAXIMUM RATINGS
2
EMITTER
Rating
Symbol
2222
2222A Unit
Collector – Emitter Voltage
Collector – Base Voltage
Emitter – Base Voltage
Collector Current — Continuous
THERMAL CHARACTERISTICS
VCEO
VCBO
VEBO
IC
30 40
60 75
5.0 6.0
600
Vdc
Vdc
Vdc
mAdc
Characteristic
Total Device Dissipation FR– 5 Board(1)
TA = 25°C
Derate above 25°C
Symbol
PD
Max Unit
225 mW
1.8 mW/°C
Thermal Resistance, Junction to Ambient
Total Device Dissipation
Alumina Substrate,(2) TA = 25°C
Derate above 25°C
RqJA
PD
556 °C/W
300 mW
2.4 mW/°C
Thermal Resistance, Junction to Ambient
Junction and Storage Temperature
DEVICE MARKING
RqJA
TJ, Tstg
417
– 55 to +150
°C/W
°C
MMBT2222LT1 = M1B; MMBT2222ALT1 = 1P
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristic
Symbol
OFF CHARACTERISTICS
Collector – Emitter Breakdown Voltage (IC = 10 mAdc, IB = 0)
MMBT2222
MMBT2222A
V(BR)CEO
Collector – Base Breakdown Voltage (IC = 10 mAdc, IE = 0)
MMBT2222
MMBT2222A
V(BR)CBO
Emitter – Base Breakdown Voltage (IE = 10 mAdc, IC = 0)
MMBT2222
MMBT2222A
V(BR)EBO
Collector Cutoff Current (VCE = 60 Vdc, VEB(off) = 3.0 Vdc)
Collector Cutoff Current (VCB = 50 Vdc, IE = 0)
(VCB = 60 Vdc, IE = 0)
(VCB = 50 Vdc, IE = 0, TA = 125°C)
(VCB = 60 Vdc, IE = 0, TA = 125°C)
Emitter Cutoff Current (VEB = 3.0 Vdc, IC = 0)
Base Cutoff Current (VCE = 60 Vdc, VEB(off) = 3.0 Vdc)
 1. FR– 5 = 1.0 0.75 0.062 in.
 2. Alumina = 0.4 0.3 0.024 in. 99.5% alumina.
MMBT2222A
MMBT2222
MMBT2222A
MMBT2222
MMBT2222A
MMBT2222A
MMBT2222A
ICEX
ICBO
IEBO
IBL
3
1
2
CASE 318 – 08, STYLE 6
SOT– 23 (TO – 236AB)
Min Max Unit
30 — Vdc
40 —
60 — Vdc
75 —
5.0 — Vdc
6.0 —
— 10 nAdc
— 0.01 µAdc
— 0.01
— 10
— 10
— 100 nAdc
— 20 nAdc
Thermal Clad is a trademark of the Bergquist Company.
Preferred devices are Motorola recommended choices for future use and best overall value.
©MMotootorroollaa,
Small–Signal
Inc. 1996
Transistors,
FETs
and
Diodes
Device
Data
1

1 Page





MMBT2222ALT1 pdf, ピン配列
+16 V
0
–2 V
MMBT2222LT1 MMBT2222ALT1
SWITCHING TIME EQUIVALENT TEST CIRCUITS
1.0 to 100 µs,
DUTY CYCLE 2.0%
< 2 ns
1 k
+ 30 V
200
CS* < 10 pF
+16 V
0
–14 V
1.0 to 100 µs,
DUTY CYCLE 2.0%
< 20 ns
1k
1N914
+ 30 V
200
CS* < 10 pF
Scope rise time < 4 ns
–4 V
*Total shunt capacitance of test jig, connectors, and oscilloscope.
Figure 1. Turn–On Time
Figure 2. Turn–Off Time
1000
700
500
300
200
100
70
50
30
20
10
0.1
0.2 0.3 0.5 0.7 1.0
2.0 3.0 5.0 7.0 10
20 30
IC, COLLECTOR CURRENT (mA)
Figure 3. DC Current Gain
50 70 100
200 300 500 700 1.0 k
1.0
0.8
0.6
0.4
0.2
0
0.005 0.01 0.02 0.03 0.05
0.1
0.2 0.3 0.5 1.0 2.0 3.0 5.0
10
20 30 50
IB, BASE CURRENT (mA)
Figure 4. Collector Saturation Region
Motorola Small–Signal Transistors, FETs and Diodes Device Data
3


3Pages


MMBT2222ALT1 電子部品, 半導体
MMBT2222LT1 MMBT2222ALT1
INFORMATION FOR USING THE SOT–23 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor packages must
be the correct size to insure proper solder connection
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
0.037
0.95
0.037
0.95
0.035
0.9
0.079
2.0
0.031
0.8
inches
mm
SOT–23
SOT–23 POWER DISSIPATION
The power dissipation of the SOT–23 is a function of the
pad size. This can vary from the minimum pad size for
soldering to a pad size given for maximum power dissipation.
Power dissipation for a surface mount device is determined
by TJ(max), the maximum rated junction temperature of the
die, RθJA, the thermal resistance from the device junction to
ambient, and the operating temperature, TA. Using the
values provided on the data sheet for the SOT–23 package,
PD can be calculated as follows:
PD =
TJ(max) – TA
RθJA
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values into
the equation for an ambient temperature TA of 25°C, one can
calculate the power dissipation of the device which in this
case is 225 milliwatts.
PD =
150°C – 25°C
556°C/W
= 225 milliwatts
The 556°C/W for the SOT–23 package assumes the use
of the recommended footprint on a glass epoxy printed circuit
board to achieve a power dissipation of 225 milliwatts. There
are other alternatives to achieving higher power dissipation
from the SOT–23 package. Another alternative would be to
use a ceramic substrate or an aluminum core board such as
Thermal Clad. Using a board material such as Thermal
Clad, an aluminum core board, the power dissipation can be
doubled using the same footprint.
SOLDERING PRECAUTIONS
The melting temperature of solder is higher than the rated
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within a
short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.
Always preheat the device.
The delta temperature between the preheat and
soldering should be 100°C or less.*
When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering method,
the difference shall be a maximum of 10°C.
The soldering temperature and time shall not exceed
260°C for more than 10 seconds.
When shifting from preheating to soldering, the
maximum temperature gradient shall be 5°C or less.
After soldering has been completed, the device should
be allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and result
in latent failure due to mechanical stress.
Mechanical stress or shock should not be applied during
cooling.
* Soldering a device without preheating can cause excessive
thermal shock and stress which can result in damage to the
device.
6 Motorola Small–Signal Transistors, FETs and Diodes Device Data

6 Page



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