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8403603ZA PDF Datasheet ( 特性, スペック, ピン接続図 )

部品番号 8403603ZA
部品説明 2K x 8 Asynchronous CMOS Static RAM
メーカ Intersil Corporation
ロゴ Intersil Corporation ロゴ 



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8403603ZA Datasheet, 8403603ZA PDF,ピン配置, 機能
HM-65162
March 1997
2K x 8 Asynchronous
CMOS Static RAM
Features
• Fast Access Time. . . . . . . . . . . . . . . . . . . . 70/90ns Max
• Low Standby Current. . . . . . . . . . . . . . . . . . . .50µA Max
• Low Operating Current . . . . . . . . . . . . . . . . . 70mA Max
• Data Retention at 2.0V . . . . . . . . . . . . . . . . . . .20µA Max
• TTL Compatible Inputs and Outputs
• JEDEC Approved Pinout (2716, 6116 Type)
• No Clocks or Strobes Required
• Equal Cycle and Access Time
• Single 5V Supply
• Gated Inputs
• No Pull-Up or Pull-Down Resistors Required
Description
The HM-65162 is a CMOS 2048 x 8 Static Random Access
Memory manufactured using the Intersil Advanced SAJI V
process. The device utilizes asynchronous circuit design for
fast cycle time and ease of use. The pinout is the JEDEC 24
pin DIP, and 32 pad 8-bit wide standard which allows easy
memory board layouts flexible to accommodate a variety of
industry standard PROMs, RAMs, ROMs and EPROMs. The
HM-65162 is ideally suited for use in microprocessor based
systems with its 8-bit word length organization. The conve-
nient output enable also simplifies the bus interface by allow-
ing the data outputs to be controlled independent of the chip
enable. Gated inputs lower operating current and also elimi-
nate the need for pull-up or pull-down resistors.
Ordering Information
PACKAGE
CERDIP
JAN#
SMD#
CLCC
SMD#
TEMP. RANGE
-40oC to +85oC
-55oC to +125oC
-55oC to +125oC
-40oC to +85oC
-55oC to 125oC
70ns/20µA (NOTE 1)
HM1-65162B-9
29110BJA
8403606JA
HM4-65162B-9
8403606ZA
NOTE:
1. Access time/data retention supply current.
90ns/40µA (NOTE 1)
HM1-65162-9
29104BJA
8403602JA
HM4-65162-9
8403602ZA
90ns/300µA (NOTE 1)
HM1-65162C-9
-
8403603JA
HM4-65162C-9
8403603ZA
PKG. NO.
F24.6
F24.6
F24.6
J32.A
J32.A
Pinouts
HM-65162
(CERDIP)
TOP VIEW
HM-65162
(CLCC)
TOP VIEW
PIN DESCRIPTION
A7 1
A6 2
A5 3
A4 4
A3 5
A2 6
A1 7
A0 8
DQ0 9
DQ1 10
DQ2 11
GND 12
24 VCC
23 A8
22 A9
21 W
20 G
19 A10
18 E
17 DQ7
16 DQ6
15 DQ5
14 DQ4
13 DQ3
4 3 2 1 32 31 30
A6 5
29 A8
A5 6
28 A9
A4 7
27 NC
A3 8
26 W
A2 9
25 G
A1 10
24 A10
A0 11
23 E
NC 12
22 DQ7
DQ0 13
21 DQ6
14 15 16 17 18 19 20
NC No Connect
A0 - A10 Address Input
E Chip Enable/Power Down
VSS/GND Ground
DQ0 - DQ7 Data In/Data Out
VCC
W
Power (+5V)
Write Enable
G Output Enable
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
6-1
File Number 3000.1

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8403603ZA

2K x 8 Asynchronous CMOS Static RAM

Intersil Corporation
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