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82C83H の電気的特性と機能

82C83HのメーカーはIntersil Corporationです、この部品の機能は「CMOS Octal Latching Inverting Bus Driver」です。


製品の詳細 ( Datasheet PDF )

部品番号 82C83H
部品説明 CMOS Octal Latching Inverting Bus Driver
メーカ Intersil Corporation
ロゴ Intersil Corporation ロゴ 




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82C83H Datasheet, 82C83H PDF,ピン配置, 機能
82C83H
March 1997
CMOS Octal Latching Inverting Bus Driver
Features
• Full 8-Bit Parallel Latching Buffer
• Bipolar 8283 Compatible
• Three-State Inverting Outputs
• Propagation Delay . . . . . . . . . . . . . . . . . . . . . . 25ns Max
• Gated Inputs
- Reduce Operating Power
- Eliminate the Need for Pull-Up Resistors
• Single 5V Power Supply
• Low Power Operation
- ICCSB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10mA
• Operating Temperature Ranges
- C82C83H . . . . . . . . . . . . . . . . . . . . . . . . .0oC to +70oC
- I82C83H . . . . . . . . . . . . . . . . . . . . . . . . -40oC to +85oC
- M82C83H . . . . . . . . . . . . . . . . . . . . . . -55oC to +125oC
Description
The Intersil 82C83H is a high performance CMOS Octal
Latching Buffer manufactured using a self-aligned silicon gate
CMOS process (Scaled SAJI IV). The 82C83H provides an 8-
bit parallel latch/buffer in a 20 lead pin package. The active
high strobe (STB) input allows transparent transfer of data
and latches data on the negative transition of this signal. The
active low output enable (OE) permits simple interface to
microprocessor systems. The 82C83H provides inverted data
at the outputs.
Ordering Information
PART NO.
CP82C83H
IP82C83H
CS82C83H
IS82C83H
CD82C83H
ID82C83H
MD82C83H/B
8406702RA
MR82C83H/B
84067022A
PACKAGE
20 Ld PDIP
20 Ld PLCC
20 Ld CERDIP
SMD#
20 Pad CLCC
SMD#
TEMP RANGE
0oC to +70oC
-40oC to +85oC
0oC to +70oC
-40oC to +85oC
0oC to +70oC
-40oC to +85oC
0oC to +70oC
-55oC to +125oC
-55oC to +125oC
-55oC to +125oC
PKG. NO
E20.3
E20.3
N20.35
N20.35
F20.3
F20.3
F20.3
F20.3
J20.A
J20.A
Pinouts
82C83H (PDIP, CERDIP)
TOP VIEW
82C83H (PLCC, CLCC)
TOP VIEW
DI0 1
DI1 2
DI2 3
DI3 4
DI4 5
DI5 6
DI6 7
DI7 8
OE 9
GND 10
20 VCC
19 DO0
18 DO1
17 DO2
16 DO3
15 DO4
14 DO5
13 DO6
12 DO7
11 STB
3 2 1 20 19
DI3 4
DI4 5
DI5 6
DI6 7
DI7 8
18 DO1
17 DO2
16 DO3
15 DO4
14 DO5
9 10 11 12 13
STB
X
H
H
H = Logic One
L = Logic Zero
X = Don‘t Care
TRUTH TABLE
OE DI DO
H X HI-Z
L LH
LHL
LX
HI-Z = High Impedance
= Negative Transition
= Latched to Value of Last
Data
PIN
DI0 - DI7
DO0 - DO7
STB
OE
PIN NAMES
DESCRIPTION
Data Input Pins
Data Output Pins
Active High Strobe
Active Low Output Enable
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
4-281
File Number 2971.1

1 Page





82C83H pdf, ピン配列
82C83H
Absolute Maximum Ratings
Thermal Information
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +8.0V
Input, Output or I/O Voltage . . . . . . . . . . . . GND 0.5V to VCC +0.5V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Operating Conditions
Operating Voltage Range . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Operating Temperature Range
C82C83H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to +70oC
I82C83H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to +85oC
M82C83H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to +125oC
Thermal Resistance (Typical)
θJAoC/W θJCoC/W
CERDIP Package . . . . . . . . . . . . . . . .
70
16
CLCC Package . . . . . . . . . . . . . . . . . .
80
20
PDIP Package . . . . . . . . . . . . . . . . . . .
75
N/A
PLCC Package . . . . . . . . . . . . . . . . . .
75
N/A
Storage Temperature Range . . . . . . . . . . . . . . . . . .-65oC to +150oC
Max Junction Temperature Ceramic Package . . . . . . . . . . . . . . +175oC
Max Junction Temperature Plastic Package. . . . . . . . . . . . . . . . +150oC
Lead Temperature (Soldering 10s) (PLCC - Lead Tips Only) . . +300oC
Die Characteristics
Gate Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 265 Gates
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
DC Electrical Specifications VCC = 5.0V ± 10%; TA = 0oC to +70oC (C82C83H);
TA = -40oC to +85oC (I82C83H);
TA = -55oC to +125oC (M82C83H)
SYMBOL
PARAMETER
MIN
MAX
UNITS
TEST CONDITIONS
VIH Logical One Input Voltage
2.0 -
2.2
V C82C83H, I82C83H,
M82C83H, (Note 1)
VIL
VOH
VOL
II
Logical Zero Input Voltage
Logical One Output Voltage
Logical Zero Output Voltage
Input Leakage Current
3.0
VCC -0.4V
-10
0.8
-
0.45
10
V
V IOH = -8mA,
IOH = -100mA, OE = GND
V IOL = 20mA, OE = GND
µA VIN = GND or VCC,
DIP Pins 1-9,11
IO Output Leakage Current
-10 10 µA VO = GND or OE VCC -0.5V
DIP Pins 12-19
lCCSB
Standby Power Supply Current
IC COP Operating Power Supply Current
-
-
10 µA VIN = VCC or GND
VCC = 5.5V Outputs Open
1 mA/ TA = +25oC, VCC = 5V, Typical
MHz
(See Note 2)
NOTES:
1. VIH is measured by applying a pulse of magnitude = VlHMIN to one data Input at a time and checking the corresponding device output for
a valid logical 1 - during valid input high time. Control pins (STB, CE) are tested separately with all device data input pins at VCC -0.4V.
2. Typical ICCOP = 1 mA/MHz of STB cycle time. (Example: 5MHz µP, ALE = 1.25MHz, ICCOP = 1.25mA).
Capacitance TA = +25oC
SYMBOL
PARAMETER
CIN
COUT
Input Capacitance
Output Capacitance
TYPICAL
13
20
UNITS
pF
pF
TEST CONDITIONS
FREQ = 1MHz, all measure-
ments are referenced to device
GND
4-283


3Pages


82C83H 電子部品, 半導体
Die Characteristics
DIE DIMENSIONS:
138.6 x 155.5 x 19 ± 1 mils
METALLIZATION:
Type: Silicon - Aluminum
Thickness: 11kÅ ± 2kÅ
Metallization Mask Layout
DI2 DI1
82C83H
GLASSIVATION:
Type: SiO2
Thickness: 8kÅ ± 1kÅ
WORST CASE CURRENT DENSITY:
2.0 x 105 A/cm2
82C83H
DI2 VCC
DO0
DO1
DO2
DI3
DO3
DI4
DO4
DI5
DO5
DI6
DI7
OE GND
STB
DO7 DO6
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
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共有リンク

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