82433NX Datasheet PDF - Intel Corporation
| Part Number | 82433NX | |
| Description | LOCAL BUS ACCELERATOR (LBX) | |
| Manufacturers | Intel Corporation | |
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82433LX 82433NX
LOCAL BUS ACCELERATOR (LBX)
Y Supports the Full 64-bit Pentium
Processor Data Bus at Frequencies up
to 66 MHz (82433LX and 82433NX)
Y Drives 3 3V Signal Levels on the CPU
Data and Address Buses (82433NX)
Y Provides a 64-Bit Interface to DRAM
and a 32-Bit Interface to PCI
Y Five Integrated Write Posting and Read
Prefetch Buffers Increase CPU and PCI
Performance
CPU-to-Memory Posted Write Buffer
4 Qwords Deep
PCI-to-Memory Posted Write Buffer
Two Buffers 4 Dwords Each
PCI-to-Memory Read Prefetch Buffer
4 Qwords Deep
CPU-to-PCI Posted Write Buffer
4 Dwords Deep
CPU-to-PCI Read Prefetch Buffer
4 Dwords Deep
Y CPU-to-Memory and CPU-to-PCI Write
Posting Buffers Accelerate Write
Performance
Y Dual-Port Architecture Allows
Concurrent Operations on the Host and
PCI Buses
Y Operates Synchronously to the CPU
and PCI Clocks
Y Supports Burst Read and Writes of
Memory from the Host and PCI Buses
Y Sequential CPU Writes to PCI
Converted to Zero Wait-State PCI
Bursts with Optional TRDY
Connection
Y Byte Parity Support for the Host and
Memory Buses
Optional Parity Generation for Host
to Memory Transfers
Optional Parity Checking for the
Secondary Cache
Parity Checking for Host and PCI
Memory Reads
Parity Generation for PCI to Memory
Writes
Y 160-Pin QFP Package
Two 82433LX or 82433NX Local Bus Accelerator (LBX) components provide a 64-bit data path between the
host CPU Cache and main memory a 32-bit data path between the host CPU bus and PCI Local Bus and a
32-bit data path between the PCI Local Bus and main memory The dual-port architecture allows concurrent
operations on the host and PCI Buses The LBXs incorporate three write posting buffers and two read prefetch
buffers to increase CPU and PCI performance The LBX supports byte parity for the host and main memory
buses The 82433NX is intended to be used with the 82434NX PCI Cache Memory Controller (PCMC) The
82433LX is intended to be used with the 82434LX PCMC During bus operations between the host main
memory and PCI the PCMC commands the LBXs to perform functions such as latching address and data
merging data and enabling output buffers Together these three components form a ‘‘Host Bridge’’ that
provides a full function dual-port data path interface linking the host CPU and PCI bus to main memory
This document describes both the 82433LX and 82433NX Shaded areas like this one describe the
82433NX operations that differ from the 82433LX
December 1995
Order Number 290478-004
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82433LX 82433NX
1 0 ARCHITECTURAL OVERVIEW
The 82430 PCIset consists of the 82434LX PCMC
and 82433LX LBX components plus either a PCI
ISA bridge or a PCI EISA bridge The 82430NX PCI-
set consists of the 82434NX PCMC and 82433NX
LBX components plus either a PCI ISA bridge or a
PCI EISA bridge The PCMC and LBX provide the
core cache and main memory architecture and
serves as the Host PCI bridge An overview of the
PCMC follows the system overview section
The Local Bus Accelerator (LBX) provides a high
performance data and address path for the
82430LX 82430NX PCIset The LBX incorporates
five integrated buffers to increase the performance
of the Pentium processor and PCI master devices
Two LBXs in the system support the following areas
1 64-bit data and 32-bit address bus of the Pentium
processor
2 32-bit multiplexed address data bus of PCI
3 64-bit data bus of the main memory
In addition the LBXs provide parity support for the
three areas noted above (discussed further in Sec-
tion 1 4)
1 1 Buffers in the LBX
The LBX components have five integrated buffers
designed to increase the performance of the Host
and PCI Interfaces of the 82430LX 82430NX
PCIset
With the exception of the PCI-to-Memory write buffer
and the CPU-to-PCI write buffer the buffers in the
LBX store data only addresses are stored in the
PCMC component
5
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| Information | Total 30 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ 82433NX.PDF Datasheet ] | |
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