|
|
74VHC240MのメーカーはFairchild Semiconductorです、この部品の機能は「Octal Buffer/Line Driver with 3-STATE Outputs」です。 |
部品番号 | 74VHC240M |
| |
部品説明 | Octal Buffer/Line Driver with 3-STATE Outputs | ||
メーカ | Fairchild Semiconductor | ||
ロゴ | |||
このページの下部にプレビューと74VHC240Mダウンロード(pdfファイル)リンクがあります。 Total 7 pages
October 1992
Revised March 1999
74VHC240
Octal Buffer/Line Driver with 3-STATE Outputs
General Description
The VHC240 is an advanced high speed CMOS octal bus
buffer fabricated with silicon gate CMOS technology. It
achieves high speed operation similar to equivalent Bipolar
Schottky TTL while maintaining the CMOS low power dissi-
pation. The VHC240 is an inverting 3-STATE buffer having
two active-LOW output enables. This device is designed to
drive buslines or buffer memory address registers.
An input protection circuit ensures that 0V to 7V can be
applied to the input pins without regard to the supply volt-
age. This device can be used to interface 5V to 3V systems
and two supply systems such as battery backup. This cir-
cuit prevents device destruction due to mismatched supply
and input voltages.
Features
s High Speed: tPD = 3.6ns (typ) at TA = 25°C
s Low power dissipation: ICC = 4 µA (max) @ TA = 25°C
s High noise immunity: VNIH = VNIL = 28% VCC (min)
s Power down protection is provided on all inputs
s Low noise: VOLP = 0.9V (max)
s Pin and function compatible with 74HC240
Ordering Code:
Order Number
74VHC240M
74VHC240SJ
74VHC240MTC
74VHC240N
Package Number
Package Description
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
OE1, OE2
I0–I7
O0–O7
Description
3-STATE Output Enable Inputs
Inputs
Outputs 3-STATE Outputs
© 1999 Fairchild Semiconductor Corporation DS011506.prf
www.fairchildsemi.com
1 Page Absolute Maximum Ratings(Note 1)
Supply Voltage (VCC)
DC Input Voltage (VIN)
DC Output Voltage (VOUT)
Input Diode Current (IIK)
Output Diode Current (IOK)
DC Output Current (IOUT)
DC VCC/GND Current (ICC)
Storage Temperature (TSTG)
Lead Temperature (TL)
(Soldering, 10 seconds)
−0.5V to +7.0V
−0.5V to +7.0V
−0.5V to VCC + 0.5V
−20 mA
±20 mA
±25 mA
±75 mA
−65°C to +150°C
260°C
Recommended Operating
Conditions (Note 2)
Supply Voltage (VCC)
2.0V to 5.5V
Input Voltage (VIN)
0V to +5.5V
Output Voltage (VOUT)
0V to VCC
Operating Temperature (TOPR)
−40°C to +85°C
Input Rise and Fall Time (tr, tf)
VCC = 3.3V ± 0.3V
0 ns/V ∼ 100 ns/V
VCC = 5.0V ± 0.5V
0 ns/V ∼ 20 ns/V
Note 1: Absolute Maximum Ratings are values beyond which the device
may be damaged or have its useful life impaired. The databook specifica-
tions should be met, without exception, to ensure that the system design is
reliable over its power supply, temperature, and output/input loading vari-
ables.Fairchild does not recommend operation outside databook specifica-
tions.
Note 2: Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Symbol
VIH
VIL
VOH
VOL
IOZ
IIN
ICC
Parameter
VCC
(V)
HIGH Level
2.0
Input Voltage
3.0 − 5.5
LOW Level
2.0
Input Voltage
3.0 − 5.5
HIGH Level
2.0
Output Voltage
3.0
4.5
3.0
4.5
LOW Level Output
2.0
Voltage
3.0
4.5
3.0
4.5
3-STATE Output
5.5
Off-State Current
Input Leakage Current
0 − 5.5
Quiescent Supply Current 5.5
Min
1.50
0.7 VCC
1.9
2.9
4.4
2.58
3.94
TA = 25°C
Typ
2.0
3.0
4.5
0.0
0.0
0.0
Max
0.50
0.3 VCC
0.1
0.1
0.1
0.36
0.36
±0.25
±0.1
4.0
TA = −40°C to +85°C
Min Max
1.50
0.7 VCC
0.50
0.3 VCC
1.9
2.9
4.4
2.48
3.80
0.1
0.1
0.1
0.44
0.44
±2.5
±1.0
40.0
Units
Conditions
V
V
VIN = VIH IOH = −50 µA
V or VIL
V IOH = −4 mA
IOH = −8 mA
VIN = VIH IOL = 50 µA
V or VIL
V IOL = 4 mA
IOL = 8 mA
µA VIN = VIH or VIL
VOUT = VCC or GND
µA VIN = 5.5V or GND
µA VIN = VCC or GND
Noise Characteristics
Symbol
Parameter
VOLP
(Note 3)
VOLV
(Note 3)
Quiet Output Maximum Dynamic VOL
Quiet Output Minimum Dynamic VOL
VIHD
(Note 3)
Minimum HIGH Level Dynamic Input Voltage
VILD
(Note 3)
Maximum LOW Level Dynamic Input Voltage
Note 3: Parameter guaranteed by design.
VCC
(V)
5.0
5.0
5.0
5.0
TA = 25°C
Typ Limits
0.6 0.9
−0.6
−0.9
3.5
1.5
Units
V
V
V
V
Conditions
CL = 50 pF
CL = 50 pF
CL = 50 pF
CL = 50 pF
3 www.fairchildsemi.com
3Pages Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC20
www.fairchildsemi.com
6
6 Page | |||
ページ | 合計 : 7 ページ | ||
|
PDF ダウンロード | [ 74VHC240M データシート.PDF ] |
データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。 |
部品番号 | 部品説明 | メーカ |
74VHC240 | OCTAL BUS BUFFER | STMicroelectronics |
74VHC240 | Octal Buffer/Line Driver with 3-STATE Outputs | Fairchild Semiconductor |
74VHC240M | OCTAL BUS BUFFER WITH 3 STATE OUTPUTS INVERTED | STMicroelectronics |
74VHC240M | Octal Buffer/Line Driver with 3-STATE Outputs | Fairchild Semiconductor |