|
|
PDF 74VHC163 Data sheet ( Hoja de datos )
| Número de pieza | 74VHC163 | |
| Descripción | 4-Bit Binary Counter with Synchronous Clear | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de 74VHC163 (archivo pdf) en la parte inferior de esta página. Total 10 Páginas | ||
|
No Preview Available !
September 1995
Revised February 2002
74VHC163
4-Bit Binary Counter with Synchronous Clear
General Description
The VHC163 is an advanced high-speed CMOS device
fabricated with silicon gate CMOS technology. It achieves
the high-speed operation similar to equivalent Bipolar
Schottky TTL while maintaining the CMOS low power dissi-
pation.
The VHC163 is a high-speed synchronous modulo-16
binary counter. This device is synchronously presettable for
application in programmable dividers and has two types of
Count Enable inputs plus a Terminal Count output for ver-
satility in forming multistage counters. The CLK input is
active on the rising edge. Both PE and MR inputs are
active on low logic level. Presetting is synchronous to rising
edge of CLK and the Clear function of the VHC163 is syn-
chronous to CLK. Two enable inputs (ENP and ENT) and
Carry Output are provided to enable easy cascading of
counters, which facilitates easy implementation of n-bit
counters without using external gates.
An input protection circuit insures that 0V to 7V can be
applied to the input pins without regard to the supply volt-
age. This device can be used to interface 5V to 3V systems
and two supply systems such as battery backup. This cir-
cuit prevents device destruction due to mismatched supply
and input voltages.
Features
s High speed: fMAX = 185 MHz (typ) at VCC = 5V
s Low power dissipation: ICC = 4 µA (max) at TA = 25°C
s Synchronous counting and loading
s High-speed synchronous expansion
s High noise immunity: VNIH = VNIL = 28% VCC (min)
s Power down protection is provided on all inputs.
s Low noise: VOLP = 0.8V (max)
s Pin and function compatible with 74HC163
Ordering Code:
Order Number Package Number
Package Description
74VHC163M
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74VHC163SJ
M16D
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74VHC163MTC
MTC16
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74VHC163N
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbols
IEEE/IEC
© 2002 Fairchild Semiconductor Corporation DS012122
www.fairchildsemi.com
1 page  
AC Electrical Characteristics
Symbol
Parameter
VCC
TA = 25°C
TA = −40° to +85°C
Units
(V) Min Typ Max Min Max
Conditions
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
fMAX
CIN
CPD
Propagation Delay
Time (CP–Qn)
Propagation Delay
Time (CP–TC, Count)
Propagation Delay
Time (CP–TC, Load)
Propagation Delay
Time (CET–TC)
Maximum Clock
Frequency
Input Capacitance
Power Dissipation
Capacitance
3.3 ± 0.3
8.3
12.8
1.0
15.0
ns CL = 15 pF
10.8
16.3
1.0
18.5
CL = 50 pF
5.0 ± 0.5
4.9 8.1 1.0 9.5 ns CL = 15 pF
6.4 10.1 1.0 11.5
CL = 50 pF
3.3 ± 0.3
8.7
13.6
1.0
16.0
ns CL = 15 pF
11.2 17.1 1.0 19.5
CL = 50 pF
5.0 ± 0.5
4.9 8.1 1.0 9.5 ns CL = 15 pF
6.4 10.1 1.0 11.5
CL = 50 pF
3.3 ± 0.3
11.0 17.2
1.0
20.0
ns CL = 15 pF
13.5
20.7
1.0
23.5
CL = 50 pF
5.0 ± 0.5
6.2
10.3
1.0
12.0
ns CL = 15 pF
7.7 12.3 1.0 14.0
CL = 50 pF
3.3 ± 0.3
7.5
12.3
1.0
14.5
ns CL = 15 pF
10.5
15.8
1.0
18.0
CL = 50 pF
5.0 ± 0.5
4.9 8.1 1.0 9.5 ns CL = 15 pF
6.4 10.1 1.0 11.5
CL = 50 pF
3.3 ± 0.3
80
55
130
85
70 MHz CL = 15 pF
50 CL = 50 pF
5.0 ± 0.5
135
95
185
125
115 MHz CL = 15 pF
85 CL = 50 pF
4 10
10 pF VCC = Open
23 pF (Note 4)
Note 4: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average
operating current can be obtained by the equation: ICC (opr) = CPD * VCC * fIN + ICC.
When the outputs drive a capacitive load, total current consumption is the sum of CPD, and ∆ICC which is obtained from the following formula:
CQ0–CQ3 and CTC are the capacitances at Q0–Q3 and TC, respectively. FCP is the input frequency of the CP.
5 www.fairchildsemi.com
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet 74VHC163.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| 74VHC161 | 4-Bit Binary Counter with Asynchronous Clear | Fairchild Semiconductor |
| 74VHC161284 | IEEE 1284 Transceiver | Fairchild Semiconductor |
| 74VHC163 | 4-Bit Binary Counter with Synchronous Clear | Fairchild Semiconductor |
| 74VHC164 | 8-Bit Serial-In/ Parallel-Out Shift Register | Fairchild Semiconductor |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |