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74VCX132のメーカーはFairchild Semiconductorです、この部品の機能は「Low Voltage Quad 2-Input NAND Gate with Schmitt Trigger Inputs and 3.6V Tolerant Inputs and Outputs」です。 |
部品番号 | 74VCX132 |
| |
部品説明 | Low Voltage Quad 2-Input NAND Gate with Schmitt Trigger Inputs and 3.6V Tolerant Inputs and Outputs | ||
メーカ | Fairchild Semiconductor | ||
ロゴ | |||
このページの下部にプレビューと74VCX132ダウンロード(pdfファイル)リンクがあります。 Total 10 pages
July 1999
Revised February 2005
74VCX132
Low Voltage Quad 2-Input NAND Gate
with Schmitt Trigger Inputs
and 3.6V Tolerant Inputs and Outputs
General Description
Features
The VCX132 contains four 2-input NAND gates with
Schmitt Trigger Inputs. The pin configuration and function
are the same as the VCX00 except the inputs have hyster-
esis between the positive-going and negative-going input
thresholds. This hysteresis is useful for transforming slowly
switching input signals into sharply defined, jitter-free out-
put signals. This product should be used where noise mar-
gin greater than that of conventional gates is required.
The VCX132 is designed for low voltage (1.4V to 3.6V) VCC
applications with I/O compatibility up to 3.6V.
s 1.4V to 3.6V VCC supply operation
s 3.6V tolerant inputs and outputs
s tPD
3.3 ns max for 3.0V to 3.6V VCC
s Power-off high impedance inputs and outputs
s Static Drive (IOH/IOL)
r24 mA @ 3.0V VCC
s Uses patented Quiet Series¥ noise/EMI reduction
This product is fabricated with an advanced CMOS tech-
nology to achieve high-speed operation while maintaining
low CMOS power dissipation.
circuitry
s Latchup performance exceeds JEDEC 78 conditions
s ESD performance:
Human body model ! 2000V
Machine model ! 250V
www.DataSsheLete4Ua.dcolemss Pb-Free DQFN package
Ordering Code:
Order Number Package Number
Package Description
74VCX132M
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74VCX132BQX
(Note 1)
MLP014A
Pb-Free 14-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC
MO-241, 2.5 x 3.0mm
74VCX132MTC
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Note 1: DQFN package available in Tape and Reel only.
Quiet Series¥ is a trademark of Fairchild Semiconductor Corporation.
© 2005 Fairchild Semiconductor Corporation DS500164
www.fairchildsemi.com
1 Page Absolute Maximum Ratings(Note 2)
Supply Voltage (VCC)
DC Input Voltage (VI)
DC Output Voltage (VO)
HIGH or LOW State (Note 3)
VCC 0V
DC Input Diode Current (IIK)
VI 0V
DC Output Diode Current (IOK)
VO 0V
VO ! VCC
DC Output Source/Sink Current
(IOH/IOL)
DC VCC or Ground Current per
Supply Pin (ICC or Ground)
Storage Temperature (TSTG)
0.5V to 4.6V
0.5V to 4.6V
0.5V to VCC 0.5V
0.5V to 4.6V
50 mA
50 mA
50 mA
r50 mA
r100 mA
65qC to 150qC
Recommended Operating
Conditions (Note 4)
Power Supply
Operating
Input Voltage
Output Voltage (VO)
HIGH or LOW State
Output Current in IOH/IOL
VCC 3.0V to 3.6V
VCC 2.3V to 2.7V
VCC 1.65V to 2.3V
VCC 1.4V to 1.6V
Free Air Operating Temperature (TA)
1.4V to 3.6V
0.3V to 3.6V
0V to VCC
r24 mA
r18 mA
r6 mA
r2 mA
40qC to 85qC
Note 2: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Note 3: IO Absolute Maximum Rating must be observed.
Note 4: Floating or unused inputs must be held HIGH or LOW.
DC Electrical Characteristics
Symbol
Parameter
Vt HIGH Level Input Voltage
Conditions
Vt LOW Level Input Voltage
VH Input Hysteresis
VOH HIGH Level Output Voltage
IOH 100 PA
IOH 12 mA
IOH 18 mA
IOH 24mA
IOH 100 PA
IOH 6 mA
IOH 12 mA
IOH 18 mA
IOH 100 PA
IOH 6 mA
IOH 100PA
IOH 2 mA
VCC
(V)
3.6
3.0
2.3
1.6
1.4
3.6
3.0
2.3
1.6
1.4
3.6
3.0
2.3
1.6
1.4
2.7 - 3.6
2.7
3.0
3.0
2.3 - 2.7
2.3
2.3
2.3
1.65 - 2.3
1.65
1.4 - 1.6
1.4
Min
0.8
0.7
0.5
0.2
0.2
0.3
0.3
0.3
0.15
0.15
VCC - 0.2
2.2
2.4
2.2
VCC - 0.2
2.0
1.8
1.7
VCC - 0.2
1.25
VCC - 0.2
1.05
Max
2.2
2.0
1.6
1.2
1.2
1.2
1.2
1.0
0.9
0.9
Units
V
V
V
V
3 www.fairchildsemi.com
3Pages AC Loading and Waveforms (VCC 1.5V r 0.1V)
TEST
SWITCH
tPLH, tPHL
Open
tPZL, tPLZ
VCC x 2 at VCC 1.5V r 0.1V
tPZH, tPHZ
GND
FIGURE 3. AC Test Circuit
FIGURE 4. Waveform for Inverting and Non-inverting Functions
Symbol
Vmi
Vmo
VCC
1.5V r 0.1V
VCC/2
VCC/2
www.fairchildsemi.com
6
6 Page | |||
ページ | 合計 : 10 ページ | ||
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部品番号 | 部品説明 | メーカ |
74VCX132 | Low Voltage Quad 2-Input NAND Gate with Schmitt Trigger Inputs and 3.6V Tolerant Inputs and Outputs | Fairchild Semiconductor |