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74V1T125SのメーカーはSTMicroelectronicsです、この部品の機能は「SINGLE BUS BUFFER 3-STATE」です。 |
部品番号 | 74V1T125S |
| |
部品説明 | SINGLE BUS BUFFER 3-STATE | ||
メーカ | STMicroelectronics | ||
ロゴ | |||
このページの下部にプレビューと74V1T125Sダウンロード(pdfファイル)リンクがあります。 Total 8 pages
® 74V1T125
SINGLE BUS BUFFER (3-STATE)
s HIGH SPEED: tPD = 3.8 ns (TYP.) at VCC = 5V
s LOW POWER DISSIPATION:
ICC = 1 µA (MAX.) at TA = 25 oC
s COMPATIBLE WITH TTL OUTPUTS:
VIH = 2V (MIN), VIL = 0.8V (MAX)
s POWER DOWN PROTECTION ON INPUTS &
OUTPUT
s SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 8 mA (MIN)
s BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
s OPERATING VOLTAGE RANGE:
VCC (OPR) = 4.5V to 5.5V
s IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74V1T125 is an advanced high-speed
CMOS SINGLE BUS BUFFER fabricated with
sub-micron silicon gate and double-layer metal
wiring C2MOS technology.
S
(SOT23-5L)
C
(SC-70)
ORDER CODE:
74V1T125S
3-STATE control input G has to be set high to
place the output into the high impedance state.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
PIN CONNECTION AND IEC LOGIC SYMBOLS
October 1999
1/8
1 Page 74V1T125
DC SPECIFICATIONS
Symb ol
Parameter
VIH High Level Input
Voltage
VIL Low Level Input
Voltage
VOH High Level Output
Voltage
VOL Low Level Output
Voltage
IOZ High Impedance
Output Leakage
Current
II Input Leakage Current
ICC Quiescent Supply
Current
∆ICC Additional Worst Case
Supply Current
IOPD Output Leakage
Current
Test Conditions
V CC
( V)
4.5 to 5.5
4.5 to 5.5
4.5 IO=-50 µA
4.5 IO=-8 mA
4.5 IO=50 µA
4.5 IO=8 mA
VI = VIH or VIL
5.5 VO = VCC or GND
0 to 5.5
5.5
VI = 5.5V or GND
VI = VCC or GND
5.5 One Input at 3.4V,
other input at VCC or
GND
0 VOUT = 5.5V
Value
TA = 25 oC
Min. Typ. Max.
2
-40 to 85 oC
Min . Max.
2
0.8 0.8
4.4 4.5
4.4
3.94 3.8
0.0 0.1
0.1
0.36 0.44
±0.25
±2.5
±0.1
1
1.35
±1.0
10
1.5
0 0.5 5.0
Un it
V
V
V
V
µA
µA
µA
mA
µA
AC ELECTRICAL CHARACTERISTICS (Input tr = tf =3 ns)
Symb ol
Parameter
tPLH Propagation Delay
tPHL Time
tPLZ Output Disable Time
tPHZ
tPZH Output Enable Time
tPZL
(*) Voltage range is 5V ± 0.5V
Test Condition
VCC (*) CL
(V) (pF )
5.0 15
5.0 50
5.0 15
5.0 50
5.0 50
Value
TA = 25 oC
Min. Typ. Max.
3.8 5.5
5.3 7.5
3.6 5.1
5.1 7.1
6.1 8.8
-40 to 85 oC
Min . Max.
1.0 6.5
1.0 8.5
1.0 6.0
1.0 8.0
1.0 10.0
Unit
ns
ns
ns
CAPACITIVE CHARACTERISTICS
Symb ol
Parameter
Test Conditions
Value
TA = 25 oC
Min. Typ. Max.
-40 to 85 oC
Min . Max.
Un it
CIN Input Capacitance
4 10
10 pF
COUT Output Capacitance
10 pF
CPD Power Dissipation
Capacitance (note 1)
14 pF
1) CPD isdefined as the value of the IC’sinternal equivalent capacitance which is calculated fromthe operating current consumption without load. (Referto
Test Circuit).Average operating current can be obtained by the following equation. ICC(opr) = CPD • VCC •fIN + ICC
3/8
3Pages 74V1T125
DIM.
A
A1
A2
b
C
D
E
E1
L
e
e1
SOT23-5L MECHANICAL DATA
MIN.
0.90
0.00
0.90
0.35
0.09
2.80
2.60
1.50
0.35
mm
TYP.
0.95
1.9
MAX.
1.45
0.15
1.30
0.50
0.20
3.00
3.00
1.75
0.55
MIN.
35.4
0.0
35.4
13.7
3.5
110.2
102.3
59.0
13.7
mils
TYP.
37.4
74.8
MAX.
57.1
5.9
51.2
19.7
7.8
118.1
118.1
68.8
21.6
6/8
6 Page | |||
ページ | 合計 : 8 ページ | ||
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PDF ダウンロード | [ 74V1T125S データシート.PDF ] |
データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。 |
部品番号 | 部品説明 | メーカ |
74V1T125 | SINGLE BUS BUFFER 3-STATE | STMicroelectronics |
74V1T125S | SINGLE BUS BUFFER 3-STATE | STMicroelectronics |