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74V1T03SのメーカーはSTMicroelectronicsです、この部品の機能は「SINGLE 2-INPUT OPEN DRAIN NAND GATE」です。 |
部品番号 | 74V1T03S |
| |
部品説明 | SINGLE 2-INPUT OPEN DRAIN NAND GATE | ||
メーカ | STMicroelectronics | ||
ロゴ | |||
このページの下部にプレビューと74V1T03Sダウンロード(pdfファイル)リンクがあります。 Total 7 pages
® 74V1T03
SINGLE 2-INPUT OPEN DRAIN NAND GATE
s HIGH SPEED: tPD = 7 ns (TYP.) at VCC = 5V
s LOW POWER DISSIPATION:
ICC = 1 µA (MAX.) at TA = 25 oC
s COMPATIBLE WITH TTL OUTPUTS:
VIH = 2V (MIN), VIL = 0.8V (MAX)
s POWER DOWN PROTECTION ON INPUTS
s OPERATING VOLTAGE RANGE:
VCC (OPR) = 4.5V to 5.5V
s IMPROVED LATCH-UP IMMUNITY
PRELIMINARY DATA
S
(SOT23-5L)
C
(SC-70)
ORDER CODE:
74V1T03S
74V1T03C
DESCRIPTION
The 74V1T03 is an advanced high-speed CMOS
SINGLE 2-INPUT OPEN DRAIN NAND GATE
fabricated with sub-micron silicon gate and
double-layer metal wiring C2MOS technology.
The internal circuit is composed of 3 stages
including buffer output, which provide high noise
immunity and stable output.
This device can, with an external pull-up resistor,
be used in wired AND configuration. This device
can also be used as a led driver in any other
application requiring a current sink.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
PIN CONNECTION AND IEC LOGIC SYMBOLS
September 1999
1/7
1 Page 74V1T03
DC SPECIFICATIONS
Symb ol
Parameter
VIH High Level Input
Voltage
VIL Low Level Input
Voltage
VOL Low Level Output
Voltage
IOZ High Impedance
Output Leakage
Current
II Input Leakage Current
ICC Quiescent Supply
Current
∆ICC Additional Worst Case
Supply Current
Test Conditions
V CC
( V)
4.5 to 5.5
4.5 to 5.5
4.5 IO=50 µA
4.5 IO=8 mA
VI = VIH or VIL
5.5 VO = VCC or GND
0 to 5.5
5.5
VI = 5.5V or GND
VI = VCC or GND
5.5 One Input at 3.4V,
other input at VCC or
GND
Value
TA = 25 oC
Min. Typ. Max.
2
-40 to 85 oC
Min . Max.
2
0.8 0.8
0.0 0.1
0.36
±0.25
0.1
0.44
±2.5
±0.1
1
1.35
±1.0
10
1.5
Un it
V
V
V
µA
µA
µA
mA
AC ELECTRICAL CHARACTERISTICS (Input tr = tf =3 ns)
Symb ol
Parameter
tPLz Propagation Delay
tPzL Time
(*) Voltage range is 5V ± 0.5V
Test Condition
VCC (*) CL
(V) (pF )
5.0 15 RL = 1 KΩ
5.0 50 RL = 1 KΩ
Value
TA = 25 oC
Min. Typ. Max.
6.3 7.0
7.0 8.0
-40 to 85 oC
Min . Max.
1.0 8.0
1.0 9.0
Unit
ns
CAPACITIVE CHARACTERISTICS
Symb ol
Parameter
Test Conditions
Value
Un it
TA = 25 oC
-40 to 85 oC
Min. Typ . Max. Min . Max.
CIN Input Capacitance
4 10
10 pF
COUT Output Capacitance
5 pF
CPD Power Dissipation
Capacitance (note 1)
10.5 pF
1) CPD isdefined as the value of the IC’sinternal equivalent capacitance which is calculated fromthe operating current consumption without load. (Referto
Test Circuit).Average operating current can be obtained by the following equation. ICC(opr) = CPD • VCC • fIN + ICC
3/7
3Pages 74V1T03
DIM.
A
A1
A2
b
C
D
E
E1
L
e
e1
MIN.
0.80
0.00
0.80
0.15
0.10
1.80
1.80
1.15
0.10
SC-70 MECHANICAL DATA
mm
TYP.
0.65
1.3
MAX.
1.10
0.10
1.00
0.30
0.18
2.20
2.40
1.35
0.30
MIN.
31.5
0.0
31.5
5.9
3.9
70.9
70.9
45.3
3.9
mils
TYP.
25.6
51.2
MAX.
43.3
3.9
39.4
11.8
7.1
86.6
94.5
53.1
11.8
6/7
6 Page | |||
ページ | 合計 : 7 ページ | ||
|
PDF ダウンロード | [ 74V1T03S データシート.PDF ] |
データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。 |
部品番号 | 部品説明 | メーカ |
74V1T03 | SINGLE 2-INPUT OPEN DRAIN NAND GATE | STMicroelectronics |
74V1T03C | SINGLE 2-INPUT OPEN DRAIN NAND GATE | STMicroelectronics |
74V1T03S | SINGLE 2-INPUT OPEN DRAIN NAND GATE | STMicroelectronics |