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74V1G14C PDF Datasheet ( 特性, スペック, ピン接続図 )

部品番号 74V1G14C
部品説明 SINGLE SCHMITT INVERTER
メーカ STMicroelectronics
ロゴ STMicroelectronics ロゴ 

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74V1G14C Datasheet, 74V1G14C PDF,ピン配置, 機能
® 74V1G14
SINGLE SCHMITT INVERTER
s HIGH SPEED: tPD = 5.5 ns (TYP.) at VCC = 5V
s LOW POWER DISSIPATION:
ICC = 1 µA (MAX.) at TA = 25 oC
s TYPICAL HYSTERESIS: Vh = 1V AT VCC=4.5V
s POWER DOWN PROTECTION ON INPUTS
s SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 8 mA (MIN)
s BALANCED PROPAGATION DELAYS:
tPLH tPHL
s OPERATING VOLTAGE RANGE:
VCC (OPR) = 2V to 5.5V
s IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74V1G14 is an advanced high-speed CMOS
SINGLE SCHMITT INVERTER fabricated with
sub-micron silicon gate and double-layer metal
wiring C2MOS technology.
The internal circuit is composed of 3 stages
including buffer output, which provide high noise
immunity and stable output.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
S
(SOT23-5L)
C
(SC-70)
ORDER CODE:
74V1G14S
74V1G14C
regard to the supply voltage. This device can be
used to interface 5V to 3V.
Pin configuration and function are the same as
those of the V1G04 but the V1G14 has
hysteresis.
This together with its schmitt trigger function
allows it to be used on line receivers with slow
rise/fall input signals.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
October 1999
1/7

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