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PDF PI6C2409 Data sheet ( Hoja de datos )
| Número de pieza | PI6C2409 | |
| Descripción | Zero-Delay Clock Buffer | |
| Fabricantes | Pericom Semiconductor Corporation | |
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PI6C24091122334455667788990011223344556677889900112233445566778899001122112233445566778899001122334455667788990011223344556677889900112211223344556677889900112233445566778899001122334455667788990011221122334455667788990011223344556677889900112233445566778899001122112233445566778899001122
Zero-Delay Clock Buffer
Product Features
• Maximum rated frequency: 133 MHz
• Low cycle-to-cycle jitter
• Input to output delay, less than 200ps
• Internal feedback allows outputs to be synchronized
to the clock input
• Operates at 3.3V VDD
• Space-saving Packages:
150-mil SOIC (W)
173-milTSSOP (L)
Functional Description
The PI6C2409 is a PLL based, zero-delay buffer, with the ability
to distribute nine outputs of up to 133MHz at 3.3V.
All the outputs are distributed from a single clock input CLKIN and
output OUT0 performs zero delay by connecting a feedback to PLL.
PI6C2409 has two banks of four outputs that can be controlled by
the selection inputs, SEL1 & SEL2. It also has a powersparing feature:
when input SEL1 is 0 and SEL2 is 1, PLL is turned off and all
outputs are referenced from CLKIN. PI6C2409 is available in
high drive and industrial environment versions.
An internal feedback on OUT0 is used to synchronize the
outputs to the input; the relationship between loading of this signal
and the outputs determines the input-output delay.
PI6C2409 are characterized for both commercial and
industrial operation
Block Diagram
CLKIN
PLL MUX
SEL1
SEL2
Decode
Logic
PI6C2409(-1, -1H)
Pin Configuration
OUT0
OUTA1
OUTA2
OUTA3
OUTA4
OUTB1
OUTB2
OUTB3
OUTB4
CLKIN
OUTA1
OUTA2
VDD
GND
OUTB1
OUTB2
SEL2
1 16
2 15
3 16-Pin 14
4 W, L 13
5 12
6 11
7 10
89
OUT0
OUTA4
OUTA3
VDD
GND
OUTB4
OUTB3
SEL1
1
PS8613A
07/15/03
1 page  
PI6C2409
Zero Delay Clock Buffer1122334455667788990011223344556677889900112233445566778899001122112233445566778899001122334455667788990011223344556677889900112211223344556677889900112233445566778899001122334455667788990011221122334455667788990011223344556677889900112233445566778899001122112233445566778899001122
DC Electrical Characteristics for Commercial Temperature Devices
Parameter
Description
Test Conditions
VIL Input LOW Voltage
VIH Input HIGH Voltage
IIL
Input LOW Current
VIN = 0V
IIH Input HIGH Current VIN = VDD
VOL Output LOW Voltage IOL = 8mA (–1); IOL = 12mA (–1H)
VOH Output HIGH Voltage IOH = –8mA (–1); IOH = –12mA (–1H)
IDD
Bypass, PLL off
SEL1 = 0 SEL2 = 1
IDD
Supply Current
Unloaded outputs, 66.67 MHz, Select inputs at VDD or GND
IDD
Supply Current
Unloaded outputs 100 MHz Select Inputs @ VDD or GND
Min.
2.0
2.4
Max.
0.8
50
125
0.4
1.0
39
54
Units
V
µA
V
mA
AC Electrical Characteristicsfor Commercial Temperature Device
Parameters
N ame 1
Test Conditions
FO Output Frequency
30pF load (–1, –1H)
10pF load, (–1, –1H)
tDC Duty Cycle (–1H)
Duty Cycle (–1,–1H)
tR Rise Time (–1)
Measured at VDD/2, FO< 50 MHz
Measured at VDD/2, FO= 66 MHz
Rise Time (–1H)
tF Fall Time (–1)
Measured between 0.8V and 2.0V
Fall Time (–1H)
tSK(O) Output to Output Skew (–1,–1H)
All outputs equally loaded, VDD/2
t0
tS K (D)
tSLEW
tJIT
tLO C K
Input to Output Delay, CLKIN
Rising Edge to OUT0 Rising Edge
(–1,–1H)
Device to Device Skew (–1,–1H)
Output Slew Rate (–1,–1H)
Cycle-to-Cycle Jitter (–1,–1H)
PLL Lock Time (–1,–1H)
Measured at VDD/2
Measured at VDD/2 on OUT0 pins of devices
Measured between 0.8V and 2.0V on –1H
device using Test Circuit #2
Measured at 66.67 MHz, loaded 30pF outputs
Stable power supply, valid clocks
presented on CLKIN pins
Min.
10
45
40
1
Typ. Max. Units
100 MHz
133
50 55
50 60 %
2.5
1.5 ns
2.5
1.5
250
0 ±350 ps
0 700
V/ns
200 ps
1.0 ms
Notes:
1. See Switching Waveforms on page 6
5
PS8613A
07/15/03
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet PI6C2409.PDF ] | |
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