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PDF MA7001 Data sheet ( 特性 )

部品番号 MA7001
部品説明 Radiation Hard 512x9 Bit FIFO
メーカ Dynex
ロゴ Dynex ロゴ 

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MA7001 Datasheet, MA7001 PDF,ピン配置, 機能
Replaces June 1999 version, DS3519-4.0
MAM7A0700011
Radiation Hard 512x9 Bit FIFO
DS3519-5.0 January 2000
The MA7001 512 x 9 FIFO is manufactured using Dynex
Semiconductor's CMOS-SOS high performance, radiation
hard, 3µm technology.
The Dynex Semiconductor Silicon-on-Sapphire process
provides significant advantages over bulk silicon substrate
technologies In addition to very good total dose hardness and
neutron hardness >1015n/cm2, the Dynex Semiconductor
technology provides very high transient gamma and single
event upset performance without compromising speed of
operation The Sapphire substrate also eliminates latch-up
giving greater flexibility of use in electrically severe
environments.
The MA7001 implements a First-ln First-Out algorithm that
reads and writes data on a first-in first-out basis. The dual-port
static RAM memory is organised as 512 words of 9 bits (8 bit
data and 1 bit for parity or control purposes).
Sequential read and write accesses are achieved using a
ring pointer architecture that requires no external addressing
information. Data is toggled in and out of the device by using
the WRITE (W) and READ (R) pins.
Full and Empty status flags prevent data overflow and
underflow. Expansion logic on the device allows for unlimited
expansion capability in both word size and depth. A
RETRANSMIT (RT) feature allows for reset of the read pointer
to its initial position to allow retransmission of data.
The device is designed for applications requiring
asynchronous and simultaneous read/write in multiprocessing
and rate buffering (sourcing and sinking data at different rates
eg. interfacing fast processors and slow peripherals).
FEATURES
s Radiation Hard CMOS-SOS Technology
s Fast Access Time 60ns Typical
s Single 5V Supply
s Inputs Fully TTL and CMOS Compatible
s -55°C to +125°C Operation
Figure 1: Block Diagram
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