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PDF MC14099BFEL Data sheet ( Hoja de datos )
| Número de pieza | MC14099BFEL | |
| Descripción | 8-Bit Addressable Latches | |
| Fabricantes | ON Semiconductor | |
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MC14099B
8-Bit Addressable Latches
The MC14099B is an 8–bit addressable latch. Data is entered in
serial form when the appropriate latch is addressed (via address pins
A0, A1, A2) and write disable is in the low state. For the MC14099B
the input is a unidirectional write only port.
The data is presented in parallel at the output of the eight latches
independently of the state of Write Disable, Write/Read or Chip
Enable.
A Master Reset capability is available on both parts.
• Serial Data Input
• Parallel Output
• Master Reset
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Capable of Driving Two Low–power TTL Loads or One Low–Power
Schottky TTL Load over the Rated Temperature Range
• MC14099B pin for pin compatible with CD4099B
MAXIMUM RATINGS (Voltages Referenced to VSS) (Note 2.)
Symbol
Parameter
Value
VDD
Vin, Vout
DC Supply Voltage Range
Input or Output Voltage Range
(DC or Transient)
– 0.5 to +18.0
– 0.5 to VDD + 0.5
Iin, Iout
Input or Output Current
(DC or Transient) per Pin
± 10
PD Power Dissipation,
per Package (Note 3.)
500
TA Ambient Temperature Range
Tstg Storage Temperature Range
TL Lead Temperature
(8–Second Soldering)
– 55 to +125
– 65 to +150
260
Unit
V
V
mA
mW
°C
°C
°C
2. Maximum Ratings are those values beyond which damage to the device
may occur.
3. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
v vhigh–impedance circuit. For proper operation, Vin and Vout should be constrained
to the range VSS (Vin or Vout) VDD.
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either VSS or VDD). Unused outputs must be left open.
http://onsemi.com
PDIP–16
P SUFFIX
CASE 648
MARKING
DIAGRAMS
16
MC14099BCP
AWLYYWW
1
16
SOIC–16
DW SUFFIX
CASE 751G
14099B
AWLYYWW
SOEIAJ–16
F SUFFIX
CASE 966
1
16
MC14099B
AWLYWW
1
A = Assembly Location
WL or L = Wafer Lot
YY or Y = Year
WW or W = Work Week
ORDERING INFORMATION
Device
Package
Shipping
MC14099BCP
PDIP–16
2000/Box
MC14099BDW
SOIC–16
2350/Box
MC14099BDWR2 SOIC–16 1000/Tape & Reel
MC14099BF
SOEIAJ–16 See Note 1.
MC14099BFEL SOEIAJ–16 See Note 1.
1. For ordering information on the EIAJ version of
the SOIC packages, please contact your local
ON Semiconductor representative.
© Semiconductor Components Industries, LLC, 2000
March, 2000 – Rev. 3
1
Publication Order Number:
MC14099B/D
1 page  
DATA OR
WRITE DISABLE
OUTPUT Q
RESET
MC14099B
50%
tPLH
90%
50%
10%
SWITCHING WAVEFORMS
VDD
VSS
tPHL
ADDRESS
tTLH tTHL
WRITE
DISABLE
tw(H)
50%
tPHL
VDD
VSS
DATA
OUTPUT Q
50%
tsu tw(L) trem
50%
tsu
50%
th
VDD
VSS
VDD
VSS
VDD
VSS
http://onsemi.com
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