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MC14017B の電気的特性と機能

MC14017BのメーカーはMotorola Semiconductorsです、この部品の機能は「Decade Counter」です。


製品の詳細 ( Datasheet PDF )

部品番号 MC14017B
部品説明 Decade Counter
メーカ Motorola Semiconductors
ロゴ Motorola Semiconductors ロゴ 




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MC14017B Datasheet, MC14017B PDF,ピン配置, 機能
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Decade Counter
The MC14017B is a five–stage Johnson decade counter with built–in code
converter. High speed operation and spike–free outputs are obtained by use
of a Johnson decade counter design. The ten decoded outputs are normally
low, and go high only at their appropriate decimal time period. The output
changes occur on the positive–going edge of the clock pulse. This part can
be used in frequency division applications as well as decade counter or
decimal decode display applications.
Fully Static Operation
DC Clock Input Circuit Allows Slow Rise Times
Carry Out Output for Cascading
Divide–by–N Counting
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load Over the Rated Temperature Range
Pin–for–Pin Replacement for CD4017B
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎTriple Diode Protection on All Inputs
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎMAXIMUM RATINGS* (Voltages Referenced to VSS)
Symbol
Parameter
Value
Unit
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎVDD DCSupplyVoltage
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎVin, Vout Input or Output Voltage (DC or Transient)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎlin, lout Input or Output Current (DC or Transient),
per Pin
– 0.5 to + 18.0
– 0.5 to VDD + 0.5
± 10
V
V
mA
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎPD Power Dissipation, per Package†
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎTstg Storage Temperature
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎTL Lead Temperature(8–SecondSoldering)
500
– 65 to + 150
260
mW
_C
_C
* Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
Ceramic “L” Packages: – 12 mW/_C From 100_C To 125_C
LOGIC DIAGRAM
Q5 Q1
12
Q7 Q3
Q9
67
11
14
CLOCK
CLOCK
ENABLE 13
15
RESET
CQ
C
DQ
RR
CQ
C
DQ
RR
CQ
C
DQ
RR
CQ
C
DQ
RR
CQ
C
DQ
RR
12
CARRY
REV 3
1/94
©MMCot1or4o0la1, I7nBc. 1995
74
3 5 4 9 10
Q0 Q6 Q2 Q3 Q4
MC14017B
L SUFFIX
CERAMIC
CASE 620
P SUFFIX
PLASTIC
CASE 648
D SUFFIX
SOIC
CASE 751B
ORDERING INFORMATION
MC14XXXBCP
MC14XXXBCL
MC14XXXBD
Plastic
Ceramic
SOIC
TA = – 55° to 125°C for all packages.
FUNCTIONAL TRUTH TABLE
(Positive Logic)
Clock
Decode
Clock Enable Reset Output=n
0 X0
n
X 10
n
X X 1 Q0
0 0 n+1
X0
n
X 0n
1 0 n+1
X = Don’t Care. If n < 5 Carry = “1”,
Otherwise = “0”.
BLOCK DIAGRAM
CLOCK 14
CLOCK
ENABLE 13
RESET 15
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
Q9
Cout
VDD = PIN 16
VSS = PIN 8
3
2
4
7
10
1
5
6
9
11
12
MOTOROLA CMOS LOGIC DATA

1 Page





MC14017B pdf, ピン配列
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎSWITCHING CHARACTERISTICS* (CL=50pF,TA=25_C)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎCharacteristic
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎOutput Rise and Fall Time
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎtTLH, tTHL = (1.5 ns/pF) CL + 25 ns
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎtTLH, tTHL = (0.75 ns/pF) CL + 12.5 ns
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎtTLH, tTHL = (0.55 ns/pF) CL + 9.5 ns
Propagation Delay Time
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎReset to Decode Output
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎtPLH, tPHL = (1.7 ns/pF) CL + 415 ns
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎtPLH, tPHL = (0.66 ns/PF) CL + 197 ns
tPLH, tPHL = (0.5 ns/pF) CL + 150 ns
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎPropagation Delay Time
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎClock to Cout
tPLH, tPHL = (1.7 ns/pF) CL + 315 ns
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎtPLH, tPHL = (0.66 ns/pF) CL + 142 ns
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎtPLH, tPHL = (0.5 ns/pF) CL + 100 ns
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎPropagation Delay Time
Clock to Decode Output
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎtPLH, tPHL = (1.7 ns/pF) CL + 415 ns
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎtPLH, tPHL = (0.66 ns/pF) CL + 197 ns
tPLH, tPHL = (0.5 ns/pF) CL + 150 ns
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎTurn–Off Delay Time
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎReset to Cout
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎtPLH = (1.7 ns/pF) CL + 315 ns
tPLH = (0.66 ns/pF) CL + 142 ns
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎtPLH = (0.5 ns/pF) CL + 100 ns
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎClock Pulse Width
Symbol
tTLH,
tTHL
tPLH,
tPHL
tPLH,
tPHL
tPLH,
tPHL
tPLH
tw(H)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎClock Frequency
fcl
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎReset Pulse Width
tw(H)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎReset Removal Time
trem
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎClock Input Rise and Fall Time
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎClock Enable Setup Time
tTLH,
tTHL
tsu
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎClock Enable Removal Time
trem
VDD
Vdc
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
Min Typ # Max Unit
ns
— 100 200
— 50 100
— 40 80
ns
— 500 1000
— 230 460
— 175 350
ns
— 400 800
— 175 350
— 125 250
ns
— 500 1000
— 230 460
— 175 350
ns
— 400 800
— 175 350
— 125 250
250 125
100 50
75 35
— ns
— 5.0 2.0 MHz
— 12 5.0
— 16 6.7
500 250
250 125
190 95
— ns
750 375
275 135
210 105
— ns
No Limit
350 175
150 75
115 52
420 260
200 100
140 70
— ns
— ns
* The formulas given are for the typical characteristics only at 25_C.
#Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
MC14017B
76
MOTOROLA CMOS LOGIC DATA


3Pages


MC14017B 電子部品, 半導体
OUTLINE DIMENSIONS
L SUFFIX
CERAMIC DIP PACKAGE
CASE 620–10
ISSUE V
–A–
16 9
–B–
18
CL
–T–
SEATING
PLANE
F
NK
E
G
D 16 PL
0.25 (0.010) M T A S
M
J 16 PL
0.25 (0.010) M T B S
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIMENSION F MAY NARROW TO 0.76 (0.030)
WHERE THE LEAD ENTERS THE CERAMIC
BODY.
INCHES
MILLIMETERS
DIM MIN MAX MIN MAX
A 0.750 0.785 19.05 19.93
B 0.240 0.295 6.10 7.49
C ––– 0.200 ––– 5.08
D 0.015 0.020 0.39 0.50
E 0.050 BSC
1.27 BSC
F 0.055 0.065 1.40 1.65
G 0.100 BSC
2.54 BSC
H 0.008 0.015 0.21 0.38
K 0.125 0.170 3.18 4.31
L 0.300 BSC
7.62 BSC
M 0_ 15_ 0_ 15_
N 0.020 0.040 0.51 1.01
–A–
16
1
H
G
P SUFFIX
PLASTIC DIP PACKAGE
CASE 648–08
ISSUE R
9
B
8
FC
S
L
–T–
SEATING
PLANE
KJ
D 16 PL
0.25 (0.010) M T A M
M
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
INCHES
MILLIMETERS
DIM MIN MAX MIN MAX
A 0.740 0.770 18.80 19.55
B 0.250 0.270 6.35 6.85
C 0.145 0.175 3.69 4.44
D 0.015 0.021 0.39 0.53
F 0.040 0.70 1.02 1.77
G 0.100 BSC
2.54 BSC
H 0.050 BSC
1.27 BSC
J 0.008 0.015 0.21 0.38
K 0.110 0.130 2.80 3.30
L 0.295 0.305 7.50 7.74
M 0_ 10_ 0_ 10 _
S 0.020 0.040 0.51 1.01
MOTOROLA CMOS LOGIC DATA
MC14017B
79

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共有リンク

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部品番号部品説明メーカ
MC14017

Decade Counter

ON Semiconductor
ON Semiconductor
MC14017B

Decade Counter

ON Semiconductor
ON Semiconductor
MC14017B

Decade Counter

Motorola Semiconductors
Motorola Semiconductors


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