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Número de pieza | MC14017B | |
Descripción | Decade Counter | |
Fabricantes | ON Semiconductor | |
Logotipo | ||
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No Preview Available ! MC14017B
Decade Counter
The MC14017B is a five−stage Johnson decade counter with
built−in code converter. High speed operation and spike−free outputs
are obtained by use of a Johnson decade counter design. The ten
decoded outputs are normally low, and go high only at their
appropriate decimal time period. The output changes occur on the
positive−going edge of the clock pulse. This part can be used in
frequency division applications as well as decade counter or decimal
decode display applications.
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Features
• Fully Static Operation
• DC Clock Input Circuit Allows Slow Rise Times
• Carry Out Output for Cascading
• Divide−by−N Counting
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Capable of Driving Two Low−Power TTL Loads or One Low−Power
Schottky TTL Load Over the Rated Temperature Range
• Pin−for−Pin Replacement for CD4017B
• Triple Diode Protection on All Inputs
• NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
• This Device is Pb−Free and is RoHS Compliant
SOIC−16
D SUFFIX
CASE 751B
PIN ASSIGNMENT
Q5 1
Q1 2
Q0 3
Q2 4
Q6 5
Q7 6
Q3 7
VSS 8
16 VDD
15 RESET
14 CLOCK
13 CE
12 Cout
11 Q9
10 Q4
9 Q8
MAXIMUM RATINGS (Voltages Referenced to VSS)
Symbol
Parameter
Value
Unit
VDD
Vin, Vout
DC Supply Voltage Range
Input or Output Voltage Range
(DC or Transient)
−0.5 to +18.0
−0.5 to VDD + 0.5
V
V
Iin, Iout
Input or Output Current
(DC or Transient) per Pin
±10 mA
PD Power Dissipation, per Package
(Note 1)
500 mW
TA Ambient Temperature Range
Tstg Storage Temperature Range
TL Lead Temperature
(8−Second Soldering)
−55 to +125
−65 to +150
260
°C
°C
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Temperature Derating: “D/DW” Packages: –7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, Vin and Vout should be constrained
to the range VSS ≤ (Vin or Vout) ≤ VDD.
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either VSS or VDD). Unused outputs must be left open.
MARKING DIAGRAM
16
14017BG
AWLYWW
1
A
WL, L
YY, Y
WW, W
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Indicator
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
© Semiconductor Components Industries, LLC, 2014
August, 2014 − Rev. 9
1
Publication Order Number:
MC14017B/D
1 page MC14017B
VSS
VDD A
VSS B
S1
S1
VDD
CLOCK Q0
ENABLE Q1
Q2
Q3
Q4
RESET Q5
Q6
Q7
Q8
Q9
CLOCK Cout
VSS
Vout
ID
EXTERNAL
POWER
SUPPLY
Decode
Outputs
Carry
VGS =
VDS =
Output
Sink Drive
(S1 to A)
Clock to 5
thru 9
(S1 to B)
VDD
Vout
Output
Source Drive
Clock to
desired
outputs
(S1 to B)
S1 to A
− VDD
Vout − VDD
Figure 1. Typical Output Source and Output Sink Characteristics Test Circuit
500 mF
PULSE
GENERATOR
fc
VDD
ID
0.01 mF
CERAMIC
CLOCK
ENABLE
RESET
CLOCK
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
Q9
Cout
VSS
CL CL CL CL CL CL CL CL CL CL CL
Figure 2. Typical Power Dissipation Test Circuit
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5
5 Page |
Páginas | Total 8 Páginas | |
PDF Descargar | [ Datasheet MC14017B.PDF ] |
Número de pieza | Descripción | Fabricantes |
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