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MC14001 の電気的特性と機能

MC14001のメーカーはON Semiconductorです、この部品の機能は「B-Suffix Series CMOS Gates」です。


製品の詳細 ( Datasheet PDF )

部品番号 MC14001
部品説明 B-Suffix Series CMOS Gates
メーカ ON Semiconductor
ロゴ ON Semiconductor ロゴ 




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MC14001 Datasheet, MC14001 PDF,ピン配置, 機能
MC14001B Series
B-Suffix Series CMOS Gates
MC14001B, MC14011B, MC14023B,
MC14025B, MC14071B, MC14073B,
MC14081B, MC14082B
The B Series logic gates are constructed with P and N channel
enhancement mode devices in a single monolithic structure
(Complementary MOS). Their primary use is where low power
dissipation and/or high noise immunity is desired.
Supply Voltage Range = 3.0 Vdc to 18 Vdc
All Outputs Buffered
Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load Over the Rated Temperature Range.
Double Diode Protection on All Inputs Except: Triple Diode
Protection on MC14011B and MC14081B
Pin–for–Pin Replacements for Corresponding CD4000 Series B
Suffix Devices
MAXIMUM RATINGS (Voltages Referenced to VSS) (Note 1.)
Symbol
Parameter
Value
VDD
Vin, Vout
DC Supply Voltage Range
Input or Output Voltage Range
(DC or Transient)
– 0.5 to +18.0
– 0.5 to VDD + 0.5
Iin, Iout
Input or Output Current
(DC or Transient) per Pin
± 10
Unit
V
V
mA
PD Power Dissipation,
per Package (Note 2.)
500 mW
TA Ambient Temperature Range
Tstg Storage Temperature Range
TL Lead Temperature
(8–Second Soldering)
– 55 to +125
– 65 to +150
260
°C
°C
°C
1. Maximum Ratings are those values beyond which damage to the device
may occur.
2. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
v vhigh–impedance circuit. For proper operation, Vin and Vout should be constrained
to the range VSS (Vin or Vout) VDD.
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either VSS or VDD). Unused outputs must be left open.
http://onsemi.com
PDIP–14
P SUFFIX
CASE 646
SOIC–14
D SUFFIX
CASE 751A
TSSOP–14
DT SUFFIX
CASE 948G
MARKING
DIAGRAMS
14
MC140XXBCP
AWLYYWW
1
14
140XXB
AWLYWW
1
14
14
0XXB
ALYW
SOEIAJ–14
F SUFFIX
CASE 965
1
14
MC140XXB
AWLYWW
1
XX = Specific Device Code
A = Assembly Location
WL or L = Wafer Lot
YY or Y = Year
WW or W = Work Week
DEVICE INFORMATION
Device
Description
MC14001B Quad 2–Input NOR Gate
MC14011B
Quad 2–Input NAND Gate
MC14023B Triple 3–Input NAND Gate
MC14025B Triple 3–Input NOR Gate
MC14071B Quad 2–Input OR Gate
MC14073B Triple 3–Input AND Gate
MC14081B
MC14082B
Quad 2–Input AND Gate
Dual 4–Input AND Gate
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 11 of this data sheet.
© Semiconductor Components Industries, LLC, 2000
March, 2000 – Rev. 1
1
Publication Order Number:
MC14001B/D

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MC14001 pdf, ピン配列
MC14001B Series
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎELECTRICAL CHARACTERISTICS (Voltages Referenced to VSS)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎCharacteristic
VDD – 55_C
25_C
125_C
Symbol Vdc Min
Max
Min
Typ (3.)
Max
Min
Max
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎOutput Voltage
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎVin= VDDor0
“0” Level VOL
5.0
0.05
10 — 0.05 —
15 — 0.05 —
0 0.05 — 0.05
0 0.05 — 0.05
0 0.05 — 0.05
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎVin = 0 or VDD
“1” Level VOH
5.0 4.95
4.95
10 9.95 — 9.95
15 14.95 — 14.95
5.0
10
15
— 4.95 —
— 9.95 —
— 14.95 —
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎInput Voltage
“0” Level
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ(VO = 4.5 or 0.5 Vdc)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ(VO = 9.0 or 1.0 Vdc)
(VO = 13.5 or 1.5 Vdc)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎΓ1” Level
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ(VO = 0.5 or 4.5 Vdc)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ(VO = 1.0 or 9.0 Vdc)
(VO = 1.5 or 13.5 Vdc)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎOutput Drive Current
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ(VOH = 2.5 Vdc)
(VOH = 4.6 Vdc)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ(VOH = 9.5 Vdc)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ(VOH = 13.5 Vdc)
Source
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ(VOL = 0.4 Vdc)
(VOL = 0.5 Vdc)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ(VOL = 1.5 Vdc)
Sink
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎInput Current
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎInput Capacitance
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ(Vin = 0)
VIL
VIH
IOH
IOL
Iin
Cin
5.0 — 1.5 —
10 — 3.0 —
15 — 4.0 —
2.25 1.5 — 1.5
4.50 3.0 — 3.0
6.75 4.0 — 4.0
5.0 3.5 — 3.5 2.75 — 3.5 —
10 7.0 — 7.0 5.50 — 7.0 —
15 11 — 11 8.25 — 11 —
5.0 – 3.0 — – 2.4 – 4.2
5.0 – 0.64 — – 0.51 – 0.88
10 – 1.6 — – 1.3 – 2.25
15 – 4.2 — – 3.4 – 8.8
— – 1.7 —
— – 0.36 —
— – 0.9 —
— – 2.4 —
5.0 0.64 — 0.51 0.88
10 1.6 — 1.3 2.25
15 4.2 — 3.4
8.8
— 0.36 —
— 0.9 —
— 2.4 —
15 — ± 0.1 — ± 0.00001 ± 0.1 — ± 1.0
—— — —
5.0 7.5 — —
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎQuiescent Current
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ(Per Package)
IDD 5.0 — 0.25 — 0.0005 0.25 —
10
0.5
0.0010
0.5
15
1.0
0.0015
1.0
7.5
15
30
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎTotal Supply Current (4.)(5.)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ(Dynamic plus Quiescent,
Per Gate, CL = 50 pF)
IT 5.0
10
15
IT = (0.3 µA/kHz) f + IDD/N
IT = (0.6 µA/kHz) f + IDD/N
IT = (0.9 µA/kHz) f + IDD/N
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ3. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
Unit
Vdc
Vdc
Vdc
Vdc
mAdc
mAdc
µAdc
pF
µAdc
µAdc
4. The formulas given are for the typical characteristics only at 25_C.
5. To calculate total supply current at loads other than 50 pF:
IT(CL) = IT(50 pF) + (CL – 50) Vfk
where: IT is in µA (per package), CL in pF, V = (VDD – VSS) in volts, f in kHz is input frequency, and k = 0.001 x the number of exercised gates
per package.
http://onsemi.com
3


3Pages


MC14001 電子部品, 半導体
MC14001B Series
TYPICAL B–SERIES GATE CHARACTERISTICS
N–CHANNEL DRAIN CURRENT (SINK)
5.0
4.0
TA = – 55°C
3.0
– 40°C
+ 85°C + 25°C
2.0
+ 125°C
1.0
0
0 1.0 2.0 3.0 4.0 5.0
VDS, DRAIN–TO–SOURCE VOLTAGE (Vdc)
Figure 2. VGS = 5.0 Vdc
P–CHANNEL DRAIN CURRENT (SOURCE)
– 10
– 9.0
– 8.0 TA = – 55°C
– 7.0
– 6.0 – 40°C
– 5.0
+ 25°C
– 4.0 + 85°C
– 3.0 + 125°C
– 2.0
– 1.0
0
0 – 1.0 – 2.0 – 3.0 – 4.0 – 5.0
VDS, DRAIN–TO–SOURCE VOLTAGE (Vdc)
Figure 3. VGS = – 5.0 Vdc
20
18
16 TA = – 55°C
14 – 40°C
12 + 25°C
+ 85°C
10
8.0 + 125°C
6.0
4.0
2.0
0
0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10
VDS, DRAIN–TO–SOURCE VOLTAGE (Vdc)
Figure 4. VGS = 10 Vdc
– 50
– 45
– 40
– 35
– 30 TA = – 55°C
– 25 – 40°C
– 20 + 25°C
+ 85°C
– 15
– 10 + 125°C
– 5.0
0
0 – 1.0 – 2.0 – 3.0 – 4.0 – 5.0 – 6.0 – 7.0 – 8.0 – 9.0 – 10
VDS, DRAIN–TO–SOURCE VOLTAGE (Vdc)
Figure 5. VGS = – 10 Vdc
50
45
40
35 TA = – 55°C
30 – 40°C
25 + 25°C
20 + 85°C
+ 125°C
15
10
5.0
0
0 2.0 4.0 6.0 8.0 10 12 14 16 18 20
VDS, DRAIN–TO–SOURCE VOLTAGE (Vdc)
– 100
– 90
– 80
– 70
– 60
– 50
TA = – 55°C
– 40°C
– 40 + 25°C
+ 85°C
– 30
+ 125°C
– 20
– 10
0
0 – 2.0 – 4.0 – 6.0 – 8.0 – 10 – 12 – 14 – 16 – 18 – 20
VDS, DRAIN–TO–SOURCE VOLTAGE (Vdc)
Figure 6. VGS = 15 Vdc
Figure 7. VGS = – 15 Vdc
These typical curves are not guarantees, but are design aids.
Caution: The maximum rating for output current is 10 mA per pin.
http://onsemi.com
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