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LC662104A の電気的特性と機能

LC662104AのメーカーはSanyoです、この部品の機能は「Four-Bit Single-Chip Microcontrollers with 4 / 6 / 8 / 12 / and 16 KB of On-Chip ROM」です。


製品の詳細 ( Datasheet PDF )

部品番号 LC662104A
部品説明 Four-Bit Single-Chip Microcontrollers with 4 / 6 / 8 / 12 / and 16 KB of On-Chip ROM
メーカ Sanyo
ロゴ Sanyo ロゴ 




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LC662104A Datasheet, LC662104A PDF,ピン配置, 機能
No. 5489
Preriminary
CMOS LSI
LC66P5316
Four-Bit Single-Chip Microcontroller
with 16 KB of On-Chip OTP PROM
Overview
The LC66P5316 is an on-chip OTP PROM version of the
LC6653XX Series CMOS 4-bit single-chip micro-
controllers. The LC66P5316 is appropriate for program
development and product evaluation since it provides
identical functionality and pin compatibility with the
LC665316A.
Features and Functions
• On-chip OTP ROM capacity of 16 kilobytes, and an on-
chip RAM capacity of 512 × 4 bits.
• Fully supports the LC66000 Series common instruction
set (128 instructions).
• I/O ports: 42 pins
• A sub-oscillator circuit can be used (option)
This circuit allows power dissipation to be reduced by
operating at lower speeds.
• 8-bit serial interface: two circuits (can be connected in
cascade to form a 16-bit interface)
• Instruction cycle time: 0.95 to 10 µs (at 4.0 to 5.5 V)
• Powerful timer functions and prescalers
— Time limit timer, event counter, pulse width
measurement, and square wave output using a 12-bit
timer.
— Time limit timer, event counter, PWM output, and
square wave output using an 8-bit timer.
— Time base function using a 12-bit prescaler
• Powerful interrupt system with 8 interrupt factors and 8
interrupt vector locations.
— External interrupts: 3 factors/3 vector locations
— Internal interrupts: 5 factors/5 vector locations
• Flexible I/O functions
16-value comparator inputs, 20-mA drive outputs,
inverter circuits, pull-up and open-drain circuits
selectable as options.
• Optional runaway detection function (watchdog timer)
• 8-bit I/O functions
• Power saving functions using halt and hold modes.
• Packages: DIP48S, QIP48E (QFP48E)
• Evaluation LSIs: LC66599 (evaluation chip) +
EVA800/850-TB662YXX2
Package Dimensions
unit: mm
3149-DIP48S
[LC66P5316]
48 25
1 24
46.0
0.48
1.05
unit: mm
3156-QFP48E
1.78 2.53
SANYO: DIP48S
SANYO DIP48
[LC66P5316]
17.2
14.0
1.5 1.0
36
1.6
1.5
25
37 24
0.15
48
1
0.35
13
12
0.1
2.70
(STAND OFF)
0.8 15.6
SANYO: QFP48E
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN
22897HA (OT) No. 5489-1/28

1 Page





LC662104A pdf, ピン配列
Pin Assignments
P20/SI0/A0
P21/SO0/A1
P22/SCK0/A2
P23/INT0/A3
P30/INT1/A4
P31/POUT0/A5
P32/POUT1/A6
VSS
OSC1
OSC2
VDD
RES/VPP/OE
PE0/XT1
PE1/XT2
TEST/EPMOD
P33/HOLD
P40/INV0I/A7
P41/INV0O/A8
P42/INV1I/A9
P43/INV1O/A10
P50/A11
P51/A12
P52/A13
P53/INT2/TA
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
DIP48S
LC66P5316
LC66P5316
48 P13/D7
47 P12/D6
46 P11/D5
45 P10/D4
44 P03/D3
43 P02/D2
42 P01/D1
41 P00/D0
40 PD3/AN4/INV4O
39 PD2/AN3/INV4I
38 PD1/AN2/INV3O
37 PD0/AN1/INV3I
36 PC3/INV2O/DASEC
35 PC2/INV2I/CE
34 PC1
33 PC0
32 P83
31 P82
30 P81/DS1
29 P80/DS0
28 P63/PIN1
27 P62/SCK1
26 P61/SO1
25 P60/SI1
QFP48E
P02/D2
P03/D3
P10/D4
P11/D5
P12/D6
P13/D7
P20/SI0/A0
P21/SO0/A1
P22/SCK0/A2
P23/INT0/A3
P30/INT1/A4
P31/POUT0/A5
36 35 34 33 32 31 30 29 28 27 26 25
37 24
38 23
39 22
40 LC66P5316 21
41 20
42 19
43 18
44 17
45 16
46 15
47 14
48 13
1 2 3 4 5 6 7 8 9 10 11 12
P81/DS1
P80/DS0
P63/PIN1
P62/SCK1
P61/SO1
P60/SI1
P53/INT2/TA
P52/A13
P51/A12
P50/A11
P43/INV1O/A10
P42/INV1I/A9
Top view
We recommend the use of reflow soldering techniques to solder-mount QFP packages.
Please consult with your Sanyo representative for details on process conditions if the package itself is to be directly
immersed in a dip-soldering bath (dip-soldering techniques).
No. 5489-3/28


3Pages


LC662104A 電子部品, 半導体
LC66P5316
Pin Function Overview
Pin
P00/D0
P01/D1
P02/D2
P03/D3
I/O Overview
Output driver type
Options
I/O ports P00 to P03
• Input or output in 4-bit or 1-bit units
I/O
• P00 to P03 support the halt mode
control function (This function can be
specified in bit units.)
• Used as data pins in EPROM mode
• Pch: Pull-up MOS type
• Nch: Intermediate sink current
type
• Pull-up MOS or
Nch OD output
• Output level on
reset
State after a Standby mode
reset
operation
High or low
(option)
Hold mode:
Output off
Halt mode:
Output
retained
P10/D4
P11/D5
P12/D6
P13/D7
I/O ports P10 to P13
I/O • Input or output in 4-bit or 1-bit units
• Used as data pins in EPROM mode
• Pch: Pull-up MOS type
• Nch: Intermediate sink current
type
• Pull-up MOS or
Nch OD output
• Output level on
reset
I/O ports P20 to P23
• Input or output in 4-bit or 1-bit units
• P20 is also used as the serial input SI0
pin.
P20/SI0/A0
• P21 is also used as the serial output
P21/SO0/A1
SO0 pin.
P22/SCK0/ I/O • P22 is also used as the serial clock
A2 SCK0 pin.
• Pch: CMOS type
• Nch: Intermediate sink current
type
CMOS or Nch OD
output
P23/INT0/A3
• P23 is also used as the INT0 interrupt
request pin, and also as the timer 0
event counting and pulse width
measurement input.
• Used as address pins in EPROM mode
High or low
(option)
Hold mode:
Output off
Halt mode:
Output
retained
Hold mode:
Output off
H
Hold mode:
Output off
I/O ports P30 to P32
• Input or output in 3-bit or 1-bit units
• P30 is also used as the INT1 interrupt
P30/INT1/A4
request.
P31/POUT0/
• P31 is also used for the square wave
A5 I/O output from timer 0.
P32/POUT1/
• P32 is also used for the square wave
• Pch: CMOS type
• Nch: Intermediate sink current
type
CMOS or Nch OD
output
A6 and PWM output from timer 1.
• P31 and P32 also support 3-state
outputs.
• Used as address pins in EPROM mode
Hold mode:
Output off
H
Halt mode:
Output
retained
P33/HOLD
Hold mode control input
• Hold mode is set up by the HOLD
instruction when HOLD is low.
• In hold mode, the CPU is restarted by
setting HOLD to the high level.
I
• This pin can be used as input port P33
along with P30 to P32.
• When the P33/HOLD pin is at the low
level, the CPU will not be reset by a
low level on the RES pin. Therefore,
applications must not set P33/HOLD
low when power is first applied.
P40/INV0I/
A7
P41/INV0O/
A8
P42/INV1I/
A9
P43/INV1O/
A10
I/O ports P40 to P43
• Input or output in 4-bit or 1-bit units
• Input or output in 8-bit units when used • Pch: Pull-up MOS type
• Pull-up MOS or
in conjunction with P50 to P53.
• CMOS type when the inverter Nch OD output
I/O • Can be used for output of 8-bit ROM
circuit option is selected
• Output level on
data when used in conjunction with
• Nch: Intermediate sink current reset
P50 to P53.
type • Inverter circuit
• Dedicated inverter circuit (option)
• Used as address pins in EPROM mode
• High or
low
(option)
• Inverter
I/O is set
to the
output off
state.
Hold mode:
Port output
off, inverter
output off
Halt mode:
Port output
retained,
inverter
output
continues
Continued on next page.
No. 5489-6/28

6 Page



ページ 合計 : 28 ページ
 
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部品番号部品説明メーカ
LC662104A

Four-Bit Single-Chip Microcontroller with 16 KB of On-Chip OTP PROM

Sanyo
Sanyo
LC662104A

Four-Bit Single-Chip Microcontrollers with 4 / 6 / and 8 KB of On-Chip ROM

Sanyo
Sanyo
LC662104A

Four-Bit Single-Chip Microcontrollers with 4 / 6 / 8 / 12 / and 16 KB of On-Chip ROM

Sanyo
Sanyo
LC662104A

Four-Bit Single-Chip Microcontrollers with 8 / 12 / and 16 KB of On-Chip ROM

Sanyo
Sanyo


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