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PDF APW704510KC-TR Data sheet ( Hoja de datos )
| Número de pieza | APW704510KC-TR | |
| Descripción | Advanced PWM and Linear Power Controller | |
| Fabricantes | Etc | |
| Logotipo |  |
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APW7045
Advanced PWM and Linear Power Controller
Features
General Description
• 2 Regulated Voltage are provided
−Switching Power for Fixed Voltage (1.0V)
−Linear Regulator for VMEM(2.5V)
• Simple Single-Loop Control Design
−Voltage-Mode PWM Control
• Excellent Output Voltage Regulation
−PWM Output: ±1%
−Linear Output: ±3%
• Fast Transient Response
−High-Bandwidth Error Amplifier
−Full 0% to 100% Duty Ratio
• Power-Good Output Voltage Monitor
• Over-Voltage and Over-Current Fault Monitors
• Small Converter Size
−200KHz Free-Running Oscillator ;
Progammable from 50KHz to 800KHz
−Reduce External Component Count
The APW7045 integrates PWM controller and linear
controller, as well as the monitoring and protection
functions into a single package, which provides two
controlled power outputs with over-voltage and over-
current protections. The PWM controller regulates
the DDR termination voltage (1.25V) or GPU Voltage
(2.05V) with a synchronous-rectified buck converter.
The linear controller regulates the Memory Voltage
(2.5V). The pre cision reference and voltage-mode
PWM control provide ±1% static regulation. The lin-
ear controller drives an external N-channel MOSFET
to provide adjustable voltage. The APW7045 moni-
tors two output voltages, and a single Power Good
signal is issued when the PWM voltage is within ±10%
of the DAC setting and the lineat regulator output level
is above under-voltage threshold. Additional built-in
over-voltage protection for the PWM output uses the
lower MOSFET to prevent output voltages above 115%
of the DAC setting. The PWM over-current function
monitors the output current by using the voltage drop
across the upper MOSFET’s R , eliminating the
DS(ON)
need for a current sensing resistor.
Pin Description
Applications
• Motherboard Power Regulation for Computers
• Low-Voltage Distributed Power Supplies
• VGA Card Power Regulation
• DDR SDRAM Power Regulation
VCC
DRIVE
PGOOD
SD
FB2
SS
FAULT
GND
1
2
3
4
5
6
7
8
16 UGATE
15 PHASE
14 LGATE
13 PGND
12 OCSET
11 VSEN1
10 FB1
9 COMP
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise
customers to obtain the latest version of relevant information to verify before placing orders.
Copyright ANPEC Electronics Corp.
Rev.A.5 - Jan., 2003
1
www.anpec.com.tw
1 page  
APW7045
Functional Pin Description (Cont.)
PGOOD (Pin 3)
PGOOD is an open collector output used to indicate
the status of the output voltages. This pin is pulled
low when the synchronous regulator output is not within
±10% of the DAC reference voltage or linear regula-
tor output is below under-voltage threshold.
SD (Pin 4)
The pin shuts down all the outputs. A TLL-compatible
, logic level high signal applied at this pin immediately
discharges the soft-start capacitor , disabling all the
outputs . Left open , this pin is pulled low by an inter-
nal pull-down resistor , enabling operation.
(RT to GND, RT ≥ 10kΩ is more accurate)
Conversely, connecting a resistor from this pin to +12V
reduces the switching frequency according to the
following equation :
Fs =200 +
47920
RT
(kHz)
(RT to 12V, RT ≥ 250 kΩ is more accurate)
Nominally, the voltage at this pin is 1.26V. In the event
of an over-voltage or over-current condition, this pin
is internally pulled to VCC.
GND (Pin 8)
FB2 (Pin 5)
Connect this pin to a resistor divider to set the linear
Signal ground for the IC. All voltage levels are
measured with respect to this pin.
regulator output voltage (VMEM). The output voltage
set by the resistor divider is determined using the
following formula :
VMEM=
1.5V
x
(1
+
ROUT
RGND
)
Where ROUT is the resistor connected from VMEM to
COMP and FB1 (Pin 9, and 10)
COMP and FB1 are the available external pins of the
PWM converter error amplifier. The FB1 pin is the
inverting input of the error amplifier. Similarly , the
COMP pin is the error amplifier output. These pins are
used to compensate the voltage-mode control feed-
back loop of the synchronous PWM converter.
FB2, and RGND is the resistor connected from FB2 to
VSEN1 (Pin 11)
ground. The voltage at this pin is also monitored for
Under-Voltage protection.
SS (Pin 6)
Connect a capacitor from this pin to ground. This
capacitor , along with an internal 28uA current source
, sets the soft-start interval of the converter.
This pin is connected to the PWM converter’s output
voltage. The PGOOD and OVP comparator circuits
use this signal to report output voltage status and for
over- voltage protection.
OCSET (Pin 12)
FAULT (Pin 7)
This pin provides oscillator switching frequency
adjustment, referring to the typical performence. By
placing a resistor (RT, kΩ) from this pin to GND, the
nominal 200kHz switching frequency is increased
Connect a resistor (ROCSET ) from this pin to the drain
of PWM converter’s upper MOSFET. ROCSET, an in-
ternal 200µA current source (IOCSET ), and the
MOSFET’s on-resistance(R ) set the converter’s
DS(ON)
over-current (OC) trip point according to the follow-
ing equation:
according to the following equation :
Fs
=200
+
4000
RT
x
(1.16
- 1.4
RT-1
)
(kHz)
IPEAK
=
IOCSET x ROCSET
RDS(ON)
Copyright ANPEC Electronics Corp.
Rev.A.5 - Jan., 2003
5
www.anpec.com.tw
5 Page 
APW7045
Reliability test program
Test item
SOLDERABILITY
HOLT
PCT
TST
ESD
Latch-Up
Method
MIL-STD-883D-2003
MIL-STD-883D-1005.7
JESD-22-B, A102
MIL-STD-883D-1011.9
MIL-STD-883D-3015.7
JESD 78
Description
245°C , 5 SEC
1000 Hrs Bias @ 125 °C
168 Hrs, 100 % RH , 121°C
-65°C ~ 150°C, 200 Cycles
VHBM > 2KV, VMM > 200V
10ms , Itr > 100mA
Carrier Tape & Reel Dimensions
Po P
D
E
P1
t
F
W
Bo
Ao D1
Ko
T2
J
C
A
B
T1
Application
A
SOP- 16
(150mil)
330 ± 3
F
7.5 ± 0.1
B
100 + 2
D
C
13 + 0.5
D1
J
2 ± 0.5
Po
T1 T2
16.4 + 0.3
- 0.2
2.5 ± 0.5
P1 Ao
W
16 ± 0.3
Bo
PE
8.0 ± 0.1 1.75 ± 0.1
Ko t
1.5 + 0.1 1.5 + 0.25 4.0 ± 0.1 2.0 ± 0.1 6.5 ± 0.1 10.3 ± 0. 1 2.1 ± 0.1 0.3 ± 0.05
Application
A
B D0 D1 E
F P0 P1 P2
SSOP-16
6.95
T
5.4 1.55±0.05 1.55±0.1 1.75±0.1 5.5±0.05 4.0±0.1 8.0±0.1 2.0±0.05
T2 W W1 C1 C2 T1 T2
C
0.3±0.05 2.2 12.0±0.3 9.5
13±0.3 21±0.8 13.5±0.5 2.0±0.2 80±1
Copyright ANPEC Electronics Corp.
Rev.A.5 - Jan., 2003
11
(mm)
www.anpec.com.tw
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet APW704510KC-TR.PDF ] | |
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