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Número de pieza TDA3608Q
Descripción Multiple voltage regulator with switch
Fabricantes NXP Semiconductors 
Logotipo NXP Semiconductors Logotipo



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INTEGRATED CIRCUITS
DATA SHEET
TDA3608Q
Multiple voltage regulator with
switch
Preliminary specification
File under Integrated Circuits, IC01
1997 Aug 14

1 page




TDA3608Q pdf
Philips Semiconductors
Multiple voltage regulator with switch
Preliminary specification
TDA3608Q
PINNING
SYMBOL PIN
DESCRIPTION
VP
REG1
1 supply voltage
2 regulator 1 output
REG3
3 regulator 3 output
EN3 4 enable input regulator 3
RES
5 reset output
EN1 6 enable input regulator 1
ENSW
7 enable input power switch
HOLD
8 hold output
CRES
GND
9 reset delay capacitor
10 ground
REG2
11 regulator 2 output
BU 12 back-up
SW 13 power switch output
handbook, halfpage
VP 1
REG1 2
REG3 3
EN3 4
RES 5
EN1 6
ENSW 7 TDA3608Q
HOLD 8
CRES 9
GND 10
REG2 11
BU 12
SW 13
MGK601
Fig.2 Pin configuration.
FUNCTIONAL DESCRIPTION
The TDA3608Q is a multiple output voltage regulator with
a power switch, intended for use in car radios with or
without a microcontroller. Because of low-voltage
operation of the car radio, low-voltage drop regulators are
used in the TDA3608Q.
Regulator 2 will switch on when the back-up voltage
exceeds 6.5 V for the first time and will switch off again
when the output voltage of regulator 2 drops below 1.9 V
(this is far below an engine start). When regulator 2 is
switched on and the output voltage of this regulator is
within its voltage range, the reset output will be enabled
(reset will go HIGH via a pull-up resistor) to generate a
reset to the microcontroller. The reset cycles can be
extended by an external capacitor at pin 9. The above
mentioned start-up feature is built-in to secure a smooth
start-up of the microcontroller at first connection, without
uncontrolled switching of regulator 2 during the start-up
sequence.
The charge of the back-up capacitor can be used to supply
regulator 2 for a short period when the supply falls down
to 0 V (time depends on value of storage capacitor).
When regulator 2 and the supply voltage (VP > 4.5 V) are
both available, regulators 1 and 3 can be operated by
means of enable inputs (pins 6 and 4 respectively).
Regulator 1 has a hold output (open collector) indicating
that the output voltage of this regulator is settled (held
HIGH by external pull-up resistor) and when the output
voltage of this regulator drops out of regulation (because
of supply voltage drop or high load) the hold output will go
LOW. The hold output signal is only valid when regulator 1
is enabled by its enable input (pin 6).
The power switch can also be controlled by means of a
separate enable input (pin 7) as shown in Fig.3 for the
behaviour of the power switch output.
All output pins are fully protected. The regulators are
protected against load dump (regulators 1 and 3 will
switch off at supply voltages >18 V) and short-circuit
(foldback current protection).
The power switch contains a current protection, but this
protection is delayed at short-circuit condition for at least
10 ms. During this time the output current is limited to a
peak value of at least 3 A and 2 A continuous (VP 18 V).
At supply voltages >17 V the power switch is clamped at
maximum 16 V (to avoid external connected circuitry being
damaged by an overvoltage) and the power switch will
switch off at load dump.
The total timing diagram is shown in Fig.3.
1997 Aug 14
5

5 Page





TDA3608Q arduino
Philips Semiconductors
Multiple voltage regulator with switch
Preliminary specification
TDA3608Q
Notes
1. Minimum operating voltage, only if VP has exceeded 6.5 V.
2. The quiescent current is measured in the standby mode. So, the enable inputs of regulators 1, 3 and the switch are
grounded and RL(REG2) = (see Fig.6).
3. The voltage of the regulator sinks as a result of a VP drop.
4. The rise and fall time is measured with a 10 kpull-up resistor and a 50 pF load capacitor.
5. The delay time depends on the value of the capacitor: td = -I-Cc---h- × VC (th) = C × (750×103) (ms)
6. The drop-out voltage of regulators 1, 2 and 3 is measured between VP and REGn.
7. At current limit, IREGmn is held constant (see Fig.4 for behaviour of IREGmn).
8. The foldback current protection limits the dissipated power at short-circuit (see Fig.4).
9. The peak current of 300 mA can only be applied for short periods (t < 100 ms).
10. The drop-out voltage measured between BU and REG2.
11. The drop-out voltage of the power switch is measured between VP and SW.
12. The maximum output current of the power switch is limited to 1.8 A when the supply voltage exceeds 18 V.
13. At short-circuit, Isc of the power switch is held constant to a lower value than the continuous current after a delay of
at least 10 ms (see Fig.5).
14. The reverse current of the back-up switch is measured when flowing out of pin VP with VP = 0 V.
1997 Aug 14
11

11 Page







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