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PDF 74LCX16543MEA Data sheet ( Hoja de datos )
| Número de pieza | 74LCX16543MEA | |
| Descripción | Low Voltage 16-Bit Registered Transceiver with 5V Tolerant Inputs and Outputs | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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May 1995
Revised April 1999
74LCX16543
Low Voltage 16-Bit Registered Transceiver with
5V Tolerant Inputs and Outputs
General Description
The LCX16543 contains sixteen non-inverting transceivers
containing two sets of D-type registers for temporary stor-
age of data flowing in either direction. Each byte has sepa-
rate control inputs which can be shorted together for full
16-bit operation. Separate Latch Enable and Output
Enable inputs are provided for each register to permit inde-
pendent input and output control in either direction of data
flow.
The LCX16543 is designed for low voltage (2.5V or 3.3V)
VCC applications with capability of interfacing to a 5V signal
environment.
The LCX16543 is fabricated with an advanced CMOS tech-
nology to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
s 5V tolerant inputs and outputs
s 2.3V–3.6V VCC specifications provided
s 5.2 ns tPD max (VCC = 3.3V), 20 µA ICC max
s Power down high impedance inputs and outputs
s Supports live insertion/withdrawal (Note 1)
s ±24 mA Output Drive (VCC = 3.0V)
s Implements patented noise/EMI reduction circuitry
s Latch-up performance exceeds 500 mA
s ESD performance:
Human Body Model > 2000V
Machine Model > 200V
Note 1: To ensure the high-impedance state during power up or down, OE
should be tied to VCC through a pull-up resistor: the minimum value or the
resistor is determined by the current-sourcing capability of the driver.
Ordering Code:
Order Number Package Number
Package Description
74LCX16543MEA
MS56A
56-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300” Wide
74LCX16543MTD
MTD56
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Logic Symbol
© 1999 Fairchild Semiconductor Corporation DS012464.prf
www.fairchildsemi.com
1 page  
DC Electrical Characteristics (Continued)
Symbol
Parameter
ICC Quiescent Supply Current
∆ICC
Increase in ICC per Input
Note 5: Outputs in disabled or 3-STATE only.
Conditions
VI = VCC or GND
3.6V ≤ VI, VO ≤ 5.5V (Note 5)
VIH = VCC −0.6V
VCC
(V)
2.3 − 3.6
2.3 − 3.6
2.3 − 3.6
TA = −40°C to +85°C
Min Max
20
±20
500
Units
µA
µA
AC Electrical Characteristics
TA = −40°C to +85°C, RL = 500 Ω
Symbol
Parameter
VCC = 3.3V ± 0.3V
CL = 50 pF
VCC = 2.7V
CL = 50 pF
VCC = 2.5V ± 0.2V
CL = 30 pF
Units
Min Max Min Max Min Max
tPHL Propagation Delay
tPLH
An to Bn or Bn to An
1.5 5.2 1.5 6.0 1.5 6.2
1.5 5.2 1.5 6.0 1.5 6.2
ns
tPHL Propagation Delay
tPLH LEBAn to An or LEABn to Bn
1.5 6.5 1.5 7.5 1.5 7.8
1.5 6.5 1.5 7.5 1.5 7.8
ns
tPZL Output Enable Time
tPZH
OEBAn or OEABn to An or Bn
1.5 6.5 1.5 7.0 1.5 8.5
ns
CEBAn or CEABn to An or Bn
1.5 6.5 1.5 7.0 1.5 8.5
tPLZ Output Disable Time
tPHZ
OEBAn or OEABn to An or Bn
1.5 6.5 1.5 7.0 1.5 7.8
ns
CEBAn or CEABn to An or Bn
1.5 6.5 1.5 7.0 1.5 7.8
tS Setup Time, HIGH or LOW,
2.5
2.5
3.0
Data to LEXXn
ns
tH Hold Time, HIGH or LOW,
1.5
1.5
2.0
Data to LEXXn
ns
tW Pulse Width, Latch Enable, LOW
3.0
3.0
3.5
ns
tOSHL
tOSLH
Output to Output Skew (Note 6)
1.0
1.0
ns
Note 6: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH). Parameter guaranteed by design.
Dynamic Switching Characteristics
Symbol
Parameter
VOLP
Quiet Output Dynamic Peak VOL
VOLV
Quiet Output Dynamic Valley VOL
Conditions
CL = 50 pF, VIH = 3.3V, VIL = 0V
CL = 30 pF, VIH = 2.5V, VIL = 0V
CL = 50 pF, VIH = 3.3V, VIL = 0V
CL = 30 pF, VIH = 2.5V, VIL = 0V
VCC
TA = 25°C
Units
(V) Typical
3.3 0.8
2.5 0.6
V
3.3 −0.8
2.5 −0.6
V
Capacitance
Symbol
CIN
CI/O
CPD
Parameter
Input Capacitance
Input/Output Capacitance
Power Dissipation Capacitance
Conditions
VCC = Open, VI = 0V or VCC
VCC = 3.3V, VI = 0V or VCC
VCC = 3.3V, VI = 0V or VCC, f = 10 MHz
Typical
7
8
20
Units
pF
pF
pF
5 www.fairchildsemi.com
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