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74LCX00MTC の電気的特性と機能

74LCX00MTCのメーカーはFairchild Semiconductorです、この部品の機能は「Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs」です。


製品の詳細 ( Datasheet PDF )

部品番号 74LCX00MTC
部品説明 Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs
メーカ Fairchild Semiconductor
ロゴ Fairchild Semiconductor ロゴ 




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74LCX00MTC Datasheet, 74LCX00MTC PDF,ピン配置, 機能
March 1995
Revised March 1999
74LCX00
Low Voltage Quad 2-Input NAND Gate with 5V Tolerant
Inputs
General Description
The LCX00 contains four 2-input NAND gates. The inputs
tolerate voltages up to 7V allowing the interface of 5V sys-
tems to 3V systems.
The 74LCX00 is fabricated with advanced CMOS technol-
ogy to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
s 5V tolerant inputs
s 2.3V–3.6V VCC specifications provided
s 5.2 ns tPD max (VCC = 3.3V), 10 µA ICC max
s Power down high impedance inputs and outputs
s ±24 mA output drive (VCC = 3.0V)
s Implements patented noise/EMI reduction circuitry
s Latch-up performance exceeds 500 mA
s ESD performance:
Human body model > 2000V
Machine model > 200V
Ordering Code:
Order Number Package Number
Package Description
74LCX00M
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
74LCX00SJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LCX00MTC
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
An, Bn
On
Description
Inputs
Outputs
© 1999 Fairchild Semiconductor Corporation DS012408.prf
www.fairchildsemi.com

1 Page





74LCX00MTC pdf, ピン配列
AC Electrical Characteristics
TA = −40°C to +85°CF, RL = 500
Symbol
Parameter
VCC = 3.3V ± 0.3V
CL = 50pF
VCC = 2.7V
CL = 50pF
VCC = 2.5V ± 0.2V
CL = 30pF
Units
Min Max Min Max Min Max
tPHL Propagation Delay
tPLH
1.5 5.2 1.5 6.0 1.5 6.2
ns
1.5 5.2 1.5 6.0 1.5 6.2
tOSHL
tOSLH
Output to Output Skew (Note 4)
1.0
1.0
ns
Note 4: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH).
Dynamic Switching Characteristics
Symbol
Parameter
VOLP
Quiet Output Dynamic Peak VOL
VOLV
Quiet Output Dynamic Valley VOL
Capacitance
Conditions
CL = 50 pF, VIH = 3.3V, VIL = 0V
CL = 30 pF, VIH = 2.5V, VIL = 0V
CL = 50 pF, VIH = 3.3V, VIL = 0V
CL = 30 pF, VIH = 2.5V, VIL = 0V
VCC TA = 25°C Unit
(V) Typical
3.3 0.8
2.5 0.6
V
3.3 0.8
2.5 0.6
V
Symbol
CIN
COUT
CPD
Parameter
Input Capacitance
Output Capacitance
Power Dissipation Capacitance
Conditions
VCC = Open, VI = 0V or VCC
VCC = 3.3V, VI = 0V or VCC
VCC = 3.3V, VI = 0V or VCC, f = 10 MHz
Typical
7
8
25
Units
pF
pF
pF
3 www.fairchildsemi.com


3Pages


74LCX00MTC 電子部品, 半導体
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
Package Number M14A
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M14D
www.fairchildsemi.com
6

6 Page



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部品番号部品説明メーカ
74LCX00MTC

Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs

Fairchild Semiconductor
Fairchild Semiconductor
74LCX00MTCX

Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs

Fairchild Semiconductor
Fairchild Semiconductor


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