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UPD703041GM の電気的特性と機能

UPD703041GMのメーカーはNECです、この部品の機能は「V850/SV1TM 32-/16-BIT SINGLE-CHIP MICROCONTROLLERS」です。


製品の詳細 ( Datasheet PDF )

部品番号 UPD703041GM
部品説明 V850/SV1TM 32-/16-BIT SINGLE-CHIP MICROCONTROLLERS
メーカ NEC
ロゴ NEC ロゴ 




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UPD703041GM Datasheet, UPD703041GM PDF,ピン配置, 機能
PRELIMINARY DATA SHEET
MOS INTEGRATED CIRCUIT
µPD703039, 703039Y, 703040, 703040Y, 703041, 703041Y
V850/SV1TM
32-/16-BIT SINGLE-CHIP MICROCONTROLLERS
DESCRIPTION
The µPD703039, 703039Y, 703040, 703040Y, 703041, and 703041Y (collectively known as the V850/SV1) are
products in the low-power series of V850 FamilyTM products, which are NEC’s single-chip microcontrollers for real-
time control.
The V850/SV1 employs the CPU core of the V850 Family, and has on-chip peripheral functions such as large
capacity ROM/RAM, a multi-function timer/counter, serial interface, A/D converter, DMA controller, PWM, and a
Vsync/Hsync separation circuit.
The V850/SV1 not only realizes the low power consumption necessary for applications such as camcorders, but
also extremely high cost performance.
Detailed function descriptions are provided in the following user’s manuals. Be sure to read them before
designing.
V850/SV1 User’s Manual Hardware
: U14462E
V850 Family User’s Manual Architecture : U10243E
FEATURES
{ 10-bit resolution A/D converter: 16 channels
{ Number of instructions: 74
{ Timer/counter
{ Minimum instruction execution time:
24-bit: 2 channels, 16-bit: 2 channels
62.5 ns (@ 16 MHz operation with main system clock)
8-bit: 8 channels
30.5 µs (@ 32.768 kHz operation with subsystem clock) { Watch timer: 1 channel
{ General-purpose registers: 32 bits × 32 registers
{ Watchdog timer: 1 channel
{ Instruction set (signed multiplication, saturation
{ DMA controller: 6 channels
operations, 32-bit shift instructions, bit manipulation { Interrupts and exceptions
instructions, load/store instructions)
Non-maskable interrupt: 2 sources
{ Memory space:
Maskable interrupt
16 MB linear address space
: µPD703039, 703040, 703041 (51 sources)
Memory block allocation function: 2 MB per block
: µPD703039Y, 703040Y, 703041Y (52 sources)
{ External bus: 16-bit multiplexed bus
Software exception: 32 sources
{ Internal memory:
Exception trap: 1 source
µPD703039, 703039Y
{ Serial interface (SIO)
(ROM: 256 KB, RAM: 8 KB)
Asynchronous serial interface (UART)
µPD703040, 703040Y
Clocked serial interface (CSI)
(ROM: 256 KB, RAM: 16 KB)
3-wire variable length serial interface (CSI4)
µPD703041, 703041Y
I2C bus interface (I2C) (µPD703039Y, 703040Y,
(ROM: 192 KB, RAM: 8 KB)
703041Y)
{ I/O lines Total: 151
{ RTP: 8 bits × 2 channels or 4 bits × 4 channels
The information contained in this document is being issued in advance of the production cycle for the
device. The parameters for the device may change before final production or NEC Corporation, at its own
discretion, may withdraw the device prior to its production.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. U13953EJ1V0DS00 (1st edition)
Date Published March 2000 N CP(K)
Printed in Japan
The mark shows major revised points.
©
2000

1 Page





UPD703041GM pdf, ピン配列
µPD703039, 703039Y, 703040, 703040Y, 703041, 703041Y
PIN CONFIGURATION
176-pin plastic LQFP (fine pitch) (24 × 24 mm)
µPD703039GM-×××-UEU
µPD703039YGM-×××-UEU
µPD703040GM-×××-UEU
µPD703040YGM-×××-UEU
µPD703041GM-×××-UEU
µPD703041YGM-×××-UEU
P12/SCK0/SCL0Note 2
P13/SI1/RXD0
P14/SO1/TXD0
P15/SCK1/ASCK0
P20/SI2/SDA1Note 2
P21/SO2
P22/SCK2/SCL1Note 2
P23/SI3/RXD1
P24/SO3/TXD1
P25/SCK3/ASCK1
P26/TI2/TO2
P27/TI3/TO3
VDD
VSS
P30/TI000
P31/TI001
P32/TI010
P33/TI011
P34/TO0
P35/TO1
P36/TI4/TO4
P37/TI5/TO5
P120/SI4
P121/SO4
P122/SCK4
P123/CLO
P124/TI6/TO6
P125/TI7/TO7
P126/TI10/TO10
P127/TI11/TO11
P180
P181
P182
P183
P184
P185
P186
P187
VDD
VSS
P190
P191
P192
P193
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
132 P87/ANI15
131 P86/ANI14
130 P85/ANI13
129 P84/ANI12
128 P83/ANI11
127 P82/ANI10
126 P81/ANI9
125 P80/ANI8
124 P77/ANI7
123 P76/ANI6
122 P75/ANI5
121 P74/ANI4
120 P73/ANI3
119 P72/ANI2
118 P71/ANI1
117 P70/ANI0
116 P147
115 P146
114 P145/RTPTRG1
113 P144/TI9/INTTI9
112 P143/INTCP93
111 P142/INTCP92
110 P141/INTCP91
109 P140/INTCP90
108 P137/TO81
107 P136/TO80
106 P135/TCLR8/INTTCLR8
105 P134/TI8/INTTI8
104 P133/INTCP83
103 P132/INTCP82
102 P131/INTCP81
101 P130/INTCP80
100 VSS
99 VDD
98 P07/INTP6
97 P06/INTP5/RTPTRG0
96 P05/INTP4/ADTRG
95 P04/INTP3
94 P03/INTP2
93 P02/INTP1
92 P01/INTP0
91 P00/NMI
90 P157/RTP17
89 P156/RTP16
Notes 1. Connect directly to VSS.
2. SCL0, SCL1, SDA0, and SDA1 are valid for the µPD703039Y, 703040Y, and 703041Y only.
Preliminary Data Sheet U13953EJ1V0DS00
3


3Pages


UPD703041GM 電子部品, 半導体
µPD703039, 703039Y, 703040, 703040Y, 703041, 703041Y
CONTENTS
1. PIN FUNCTIONS .................................................................................................................................. 7
1.1 Port Pins .................................................................................................................................................... 7
1.2 Non-Port Pins........................................................................................................................................... 11
1.3 Pin I/O Circuits, I/O Buffer Supply, and Recommended Connection of Unused Pins ....................... 14
2. ELECTRICAL SPECIFICATIONS...................................................................................................... 18
3. PACKAGE DRAWING ....................................................................................................................... 37
4. RECOMMENDED SOLDERING CONDITIONS................................................................................ 38
6 Preliminary Data Sheet U13953EJ1V0DS00

6 Page



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部品番号部品説明メーカ
UPD703041GM

V850/SV1TM 32-/16-BIT SINGLE-CHIP MICROCONTROLLERS

NEC
NEC


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